Catalogo dei prodotti della ricerca

MONSURRO', PIETRO
 Distribuzione geografica
Salva come PNG Salva come JPEG
Continente #
NA - Nord America 2.969
EU - Europa 1.106
AS - Asia 459
SA - Sud America 20
AF - Africa 9
OC - Oceania 3
Continente sconosciuto - Info sul continente non disponibili 2
Totale 4.568
Salva come PNG Salva come JPEG
Nazione #
US - Stati Uniti d'America 2.946
IT - Italia 614
SE - Svezia 207
SG - Singapore 197
IN - India 148
CN - Cina 83
FI - Finlandia 44
UA - Ucraina 40
DE - Germania 38
GB - Regno Unito 38
FR - Francia 32
IE - Irlanda 23
BG - Bulgaria 22
AR - Argentina 19
CA - Canada 19
BE - Belgio 10
AT - Austria 8
HK - Hong Kong 7
RO - Romania 7
CH - Svizzera 6
CI - Costa d'Avorio 6
NL - Olanda 5
PK - Pakistan 5
TW - Taiwan 5
IR - Iran 4
MX - Messico 4
PL - Polonia 4
RU - Federazione Russa 4
AU - Australia 3
KR - Corea 3
TR - Turchia 3
EU - Europa 2
GR - Grecia 2
LT - Lituania 2
MY - Malesia 2
SC - Seychelles 2
CL - Cile 1
IL - Israele 1
JO - Giordania 1
ZA - Sudafrica 1
Totale 4.568
Salva come PNG Salva come JPEG
Città #
Fairfield 550
Ashburn 262
Woodbridge 249
Rome 213
Seattle 213
Houston 198
Cambridge 179
Wilmington 167
Singapore 128
Chandler 127
San Paolo di Civitate 117
Ann Arbor 92
Princeton 92
Lawrence 69
Beijing 66
Plano 58
Millbury 57
San Diego 49
New York 43
Mountain View 37
Boston 36
Andover 26
Boardman 23
Dublin 23
Milan 22
Sofia 22
Latina 21
Federal 19
Southend 18
Linköping 17
Norwalk 17
Santa Clara 15
Toronto 14
Falls Church 10
Tivoli 9
Bari 8
Brussels 8
Catania 8
Dallas 7
Dearborn 7
Jacksonville 7
Redwood City 7
Washington 7
Abidjan 6
Florence 6
Nuremberg 6
Bühl 5
Mcallen 5
Medford 5
Nanjing 5
Paris 5
Romola 5
Banino 4
Gussago 4
Hong Kong 4
Palermo 4
San Mateo 4
Waldorf 4
Ancona 3
Bern 3
Bochum 3
Calenzano 3
Des Moines 3
Fiesse 3
Grafing 3
Lappeenranta 3
Lexington 3
Los Angeles 3
Mexico City 3
Taichung 3
Tehran 3
Vienna 3
Zurich 3
Adelaide 2
Agrigento 2
Amsterdam 2
Ankara 2
Appleton 2
Bologna 2
Buffalo 2
Chakwal 2
Delhi 2
Falkenstein 2
Ferentino 2
Formia 2
Genoa 2
Ghaziabad 2
Incisa 2
Innsbruck 2
Islamabad 2
Kuala Lumpur 2
Laurel 2
London 2
L’Aquila 2
Mannheim 2
Medole 2
Misterbianco 2
Naples 2
New Bedfont 2
Ottawa 2
Totale 3.488
Salva come PNG Salva come JPEG
Nome #
Calibrating sample and hold stages with pruned Volterra kernels 117
A 0.6 V class-AB rail-to-rail CMOS OTA exploiting threshold lowering 106
0.9-V CMOS cascode amplifier with body-driven gain boosting 97
A gain-enhancing technique for very low-voltage amplifiers 90
Low power DDA-based instrumentation amplifier for neural recording applications in 65 nm CMOS 90
Secure double rate registers as an RTL countermeasure against power analysis attacks 90
Very low voltage CMOS two-stage amplifier 89
0.6-V CMOS cascode OTA with complementary gate-driven gain-boosting and forward body bias 89
Comparative performance analysis and complementary triode based CMFB circuits for fully differential class AB symmetrical OTAs with low power consumption 85
Univariate power analysis attacks exploiting static dissipation of nanometer CMOS VLSI circuits for cryptographic applications 82
A distortion model for pipeline analog-to-digital converters 80
Power-constrained bandwidth optimization in cascaded open-loop amplifiers 80
A simple technique for fast digital background calibration of A/D converters 79
A fully-differential class-AB OTA with CMRR improved by local feedback 78
A very low-voltage differential amplifier for opamp design 77
A 10 GHz inductorless active SiGe HBT lowpass filter 76
Analysis and implementation of a minimum-supply body-biased CMOS differential amplifier cell 76
Calibration of pipeline ADC with pruned Volterra kernels 73
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate 72
The AB-CCII, a novel adaptive biasing LV-LP current conveyor architecture 71
Blind and reference channel-based time interleaved ADC calibration schemes. A comparison 69
Design Solutions for Sample-and-Hold Circuits in CMOS Nanometer Technologies 68
Architecture and modeling of a novel optical beamforming network suitable for microwave photonics implementation 67
VHDL implementation of FWL RLS algorithm 65
Implementing radar algorithms on CUDA hardware 65
A class-AB linear transconductor with enhanced linearity 65
88-μ A 1-MHz stray-insensitive CMOS current-mode interface IC for differential capacitive sensors 64
A model for the distortion due to switch on-resistance in sample-and-hold circuits 64
A class-AB flipped voltage follower output stage 62
Subsampling models of bandwidth mismatch for time-interleaved converter calibration 62
High-tuning-range CMOS band-pass if filter based on a low-Q cascaded biquad optimization technique 62
A 0.3 V Three-Stage Body-Driven OTA 61
Exploiting the Body of MOS Devices for High Performance Analog Design 61
Fully differential class-AB OTA with improved CMRR 60
Class-AB current conveyors based on the FVF 60
A topology of fully differential class-AB symmetrical OTA with improved CMRR 60
A new class-AB Flipped Voltage Follower using a common-gate auxiliary amplifier 59
Reconfigurable low voltage inverter-based sample-and-hold amplifier 58
Efficient Digital Background Calibration of Time-Interleaved Pipeline Analog-to-Digital Converters 56
Microwave fiber optic link linearization by design-oriented analytic model 56
On the use of voltage conveyors for the synthesis of biquad filters and arbitrary networks 55
Using feed array networks to control distortions in antenna reflector for astrophysical radio-astronomy 54
Area-efficient low-power bandpass Gm-C filter for epileptic seizure detection in 130nm CMOS 53
An ultra-low-voltage class-AB OTA exploiting local CMFB and body-to-gate interface 53
Linearization technique for source-degenerated CMOS differential transconductor 52
High‐gain, high‐CMRR class AB operational transconductance amplifier based on the flipped voltage follower 52
Low power switched-resistor band-pass filter for neural recording channels in 130nm CMOS 52
Source-degenerated CMOS transconductor with auxiliary linearization 50
A novel transimpedance amplifier with variable gain 50
Behavioral Modeling for Calibration of Pipeline Analog-To-Digital Converters 49
A 2-channel digitizer based on MFP strategy 48
Improved Digital Background Calibration of Time-Interleaved Pipeline A/D Converters 47
Power-efficient dynamic-biased CCII 46
An MDAC architecture with low sensitivity to finite opamp gain 45
10-GHz fully differential Sallen–Key lowpass biquad filters in 55nm SiGe BICMOS technology 45
A class-AB very low voltage amplifier and sample & hold circuit 44
Inverting closed-loop amplifier architecture with reduced gain error and high input impedance 44
A power efficient frequency divider with 55 GHz self-oscillating frequency in SiGe BiCMOS 44
null 44
A novel OTA architecture exploiting current gain stages to boost bandwidth and slew-rate 40
A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations 39
Multi-rate signal processing based model for high-speed digitizers 39
An improved reversed miller compensation technique for three-stage CMOS OTAs with double pole-zero cancellation and almost single-pole frequency response 38
A SiGe HBT 6th-order 10 GHz inductor-less anti-aliasing low-pass filter for high-speed ATI digitizers 38
A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers 35
Biasing technique via bulk terminal for minimum supply CMOS amplifier 33
High-accuracy low-cost generalized complex pruned Volterra models for nonlinear calibration 32
Machine learning techniques for frequency sharing in a cognitive radar 32
High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain 31
Calibration of time-interleaved ADCs via Hermitianity-preserving Taylor approximations 31
Low-power class-AB 4th-order low-pass filter based on current conveyors with dynamic mismatch compensation of biasing errors 30
A low-power class-AB Gm-C biquad stage in CMOS 40nm technology 30
Nonlinear Adaptive Biasing for Low-Voltage Class-AB OTAs 28
A 17 GHz inductorless low-pass filter based on a quasi-Sallen–Key approach 28
Two novel architectures for 4-channel mixing/filtering/processing digitizers 28
Design of broadband high dynamic-range fiber optic links 27
Streamline calibration modelling for a comprehensive design of ATI-based digitizers 27
New models for the calibration of four-channel time-interleaved ADCs using filter banks 27
Parallel and hierarchical architectures of 4-channel MFP digitizer 26
Faster, stabler, and simpler - A recursive-least-squares algorithm exploiting the Frisch-Waugh-Lovell theorem 25
Digital background calibration of subsampling time-interleaved ADCs 24
A New Fully Closed-Loop, High-Precision, Class-AB CCII for Differential Capacitive Sensor Interfaces 23
Unity-gain amplifier with theoretically zero gain error 22
An E-band variable gain amplifier with 24 dB-control range and 80 to 100 GHz 1 dB bandwidth in SiGe BiCMOS technology 22
A novel parallel digitizer with a pulseless mixing-filtering-processing architecture and Its implementation in a SiGe HBT technology at 40GS/s 22
A body-driven rail-to-rail 0.3 V operational transconductance amplifier exploiting current gain stages 22
Sub-μW front-end low noise amplifier for neural recording applications 21
An Integrated Tool for Analysis and Design of Fiber-Optic Analog Links 20
Wideband spectrum estimation in frequency dense environments 20
D-band phased array antenna module for 5G backhaul 19
High-speed CMOS-to-ECL pad driver in 0.18 um CMOS 19
Design strategy for biquad-based continuous-time low-pass filters 18
Effect of components relative tolerance in the magnitude response of a Gm-C biquad 16
General approach to the calibration of innovative MFP multi-channel digitizers 16
On the Feasibility of Cascode and Regulated Cascode Amplifier Stages in ULV Circuits Exploiting MOS Transistors in Deep Subthreshold Operation 11
Methods for Model Complexity Reduction for the Nonlinear Calibration of Amplifiers Using Volterra Kernels 10
null 10
A novel FVF-based GHz-range biquad in a 28 nm CMOS FD-SOI technology 9
An intermodulation radar for non-linear target and transceiver detection 7
Switched-capacitor body-biasing technique for very low voltage CMOS amplifiers 4
Totale 4.867
Salva come PNG Salva come JPEG
Categoria #
all - tutte 15.090
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 15.090
Salva come PNG Salva come JPEG


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020801 0 0 0 42 110 102 121 118 114 80 85 29
2020/2021477 42 39 30 28 52 25 6 39 80 84 31 21
2021/2022985 91 47 94 25 102 31 42 87 74 69 131 192
2022/2023826 179 243 40 63 55 51 13 46 47 32 36 21
2023/2024581 39 54 77 25 41 95 40 19 24 79 41 47
2024/2025273 37 73 119 44 0 0 0 0 0 0 0 0
Totale 4.868