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In this paper we present a low-power low-voltage class-AB amplifier with rail-to-rail output swing capable of operating from 0.5V to 1.0V of supply voltage, and two Sample & Hold (SHA) circuits based on this amplifier. The bias current and the bandwidth of the amplifier depend on the voltage supply, so that for low-power operation a low supply voltage can be used. The two SHAs have a nominal gain of one and two: as the latter is the basic stage of a Multiplying DAC (MDAC), the proposed amplifier may be used to obtain a low-voltage low-power pipeline Analog-to-Digital Converter (ADC). The design has been validated by simulations using the technology models of the STMicroelectronics 65nm CMOS process. The two-stage amplifier has a gain of 26dB at 0.5V, which increases up to 37dB at 1.0V, and a unity gain frequency of 14MHz when supplied at 0.5V, which increases beyond 1GHz at 1.0V. The two SHAs can work at up to 5MSps with a 0.5V supply and consume less than 2μW, showing a THD of -56dB throughout the Nyquist band. Higher sampling frequencies can be obtained increasing the supply voltage and power consumption. © 2011 IEEE.

A class-AB very low voltage amplifier and sample & hold circuit / Centurelli, Francesco; Monsurro', Pietro; Trifiletti, Alessandro. - (2011), pp. 794-797. ((Intervento presentato al convegno 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 tenutosi a Linkoping nel 29 August 2011 through 31 August 2011.

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