CENTURELLI, Francesco
CENTURELLI, Francesco
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE, ELETTRONICA E TELECOMUNICAZIONI
0.5-V frequency dividers in folded MCML exploiting forward body bias: analysis and comparison
2021 Centurelli, Francesco; Scotti, Giuseppe; Palumbo, Gaetano
0.6-V CMOS cascode OTA with complementary gate-driven gain-boosting and forward body bias
2020 Cellucci, D.; Centurelli, F.; Di Stefano, V.; Monsurro, P.; Pennisi, S.; Scotti, G.; Trifiletti, A.
10-GHz fully differential Sallen–Key lowpass biquad filters in 55nm SiGe BICMOS technology
2020 Centurelli, F.; Monsurro, P.; Scotti, G.; Tommasino, P.; Trifiletti, A.
2.5 Gb/s 20-pin DIL receiver module
1999 A., Pallotta; M., Magliocco; Trifiletti, Alessandro; Centurelli, Francesco; Tommasino, Pasquale
80 dB tuning range transimpedance amplifier exploiting the Switched-Resistor approach
2022 Centurelli, Francesco; Fava, Alessandro; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate
2021 Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3 V Three-Stage Body-Driven OTA
2023 Della Sala, Riccardo; Centurelli, Francesco; Monsurro, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3 V, rail-to-rail, ultralow-power, non-tailed, body-driven, sub-threshold amplifier
2021 Centurelli, Francesco; DELLA SALA, Riccardo; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations
2023 DELLA SALA, Riccardo; Centurelli, Francesco; Monsurro', Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.6 V class-AB rail-to-rail CMOS OTA exploiting threshold lowering
2018 Centurelli, F.; Monsurrò, P.; Parisi, G.; Tommasino, P.; Trifiletti, A.
A 10 Gb/s CDR in SiGe BiCMOS commercial technology with multistandard capability
2003 Centurelli, Francesco; A., Golfarelli; J., Guinea; L., Masini; D., Morigi; M., Pozzoni; Scotti, Giuseppe; Trifiletti, Alessandro
A 10 Gb/s CMU in SiGe BiCMOS commercial technology with multistandard capability
2003 Centurelli, Francesco; A., Golfarelli; J., Guinea; L., Masini; D., Morigi; M., Pozzoni; Scotti, Giuseppe; Trifiletti, Alessandro
A 10 Gb/s CMU/CDR chip-set in SiGe BiCMOS commercial technology with multistandard capability
2005 Centurelli, Francesco; A., Golfarelli; J., Guinea; L., Masini; D., Morigi; M., Pozzoni; Scotti, Giuseppe; Trifiletti, Alessandro
A 10 GHz inductorless active SiGe HBT lowpass filter
2018 Centurelli, Francesco; Monsurrò, Pietro; Trifiletti, Alessandro
A 2.7 V, 8 GHz monolithic I/Q RC oscillator with active inductance loads
2000 J., VAN DER TANG; D., Kasperkowitz; Centurelli, Francesco; A., VAN ROERMUND
A 2.7 V, 8 GHz monolithic I/Q RC oscillator with active inductive loads
2000 Van Der Tang, J.; Kasperkovitz, D.; Centurelli, F.; Van Roermund, A.
A bandwidth-compensated transimpedance amplifier for multi-gigabit optical receivers
2001 Centurelli, Francesco; R., Luzzi; Scotti, Giuseppe; Trifiletti, Alessandro
A behavioral model of a noisy VCO for efficient time-domain simulation
2002 Centurelli, Francesco; A., Ercolani; Tommasino, Pasquale; Trifiletti, Alessandro
A behavioral model of a noisy VCO for efficient time-domain simulation
2004 Centurelli, Francesco; A., Ercolani; Scotti, Giuseppe; Tommasino, Pasquale; Trifiletti, Alessandro
A Biasing Approach to design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs
2022 Centurelli, F.; Giustolisi, G.; Pennisi, S.; Scotti, G.
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
0.5-V frequency dividers in folded MCML exploiting forward body bias: analysis and comparison | 2021 | Centurelli, Francesco; Scotti, Giuseppe; Palumbo, Gaetano | |
0.6-V CMOS cascode OTA with complementary gate-driven gain-boosting and forward body bias | 2020 | Cellucci, D.; Centurelli, F.; Di Stefano, V.; Monsurro, P.; Pennisi, S.; Scotti, G.; Trifiletti, A. | |
10-GHz fully differential Sallen–Key lowpass biquad filters in 55nm SiGe BICMOS technology | 2020 | Centurelli, F.; Monsurro, P.; Scotti, G.; Tommasino, P.; Trifiletti, A. | |
2.5 Gb/s 20-pin DIL receiver module | 1999 | A., Pallotta; M., Magliocco; Trifiletti, Alessandro; Centurelli, Francesco; Tommasino, Pasquale | |
80 dB tuning range transimpedance amplifier exploiting the Switched-Resistor approach | 2022 | Centurelli, Francesco; Fava, Alessandro; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate | 2021 | Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.3 V Three-Stage Body-Driven OTA | 2023 | Della Sala, Riccardo; Centurelli, Francesco; Monsurro, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.3 V, rail-to-rail, ultralow-power, non-tailed, body-driven, sub-threshold amplifier | 2021 | Centurelli, Francesco; DELLA SALA, Riccardo; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations | 2023 | DELLA SALA, Riccardo; Centurelli, Francesco; Monsurro', Pietro; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.6 V class-AB rail-to-rail CMOS OTA exploiting threshold lowering | 2018 | Centurelli, F.; Monsurrò, P.; Parisi, G.; Tommasino, P.; Trifiletti, A. | |
A 10 Gb/s CDR in SiGe BiCMOS commercial technology with multistandard capability | 2003 | Centurelli, Francesco; A., Golfarelli; J., Guinea; L., Masini; D., Morigi; M., Pozzoni; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 10 Gb/s CMU in SiGe BiCMOS commercial technology with multistandard capability | 2003 | Centurelli, Francesco; A., Golfarelli; J., Guinea; L., Masini; D., Morigi; M., Pozzoni; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 10 Gb/s CMU/CDR chip-set in SiGe BiCMOS commercial technology with multistandard capability | 2005 | Centurelli, Francesco; A., Golfarelli; J., Guinea; L., Masini; D., Morigi; M., Pozzoni; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 10 GHz inductorless active SiGe HBT lowpass filter | 2018 | Centurelli, Francesco; Monsurrò, Pietro; Trifiletti, Alessandro | |
A 2.7 V, 8 GHz monolithic I/Q RC oscillator with active inductance loads | 2000 | J., VAN DER TANG; D., Kasperkowitz; Centurelli, Francesco; A., VAN ROERMUND | |
A 2.7 V, 8 GHz monolithic I/Q RC oscillator with active inductive loads | 2000 | Van Der Tang, J.; Kasperkovitz, D.; Centurelli, F.; Van Roermund, A. | |
A bandwidth-compensated transimpedance amplifier for multi-gigabit optical receivers | 2001 | Centurelli, Francesco; R., Luzzi; Scotti, Giuseppe; Trifiletti, Alessandro | |
A behavioral model of a noisy VCO for efficient time-domain simulation | 2002 | Centurelli, Francesco; A., Ercolani; Tommasino, Pasquale; Trifiletti, Alessandro | |
A behavioral model of a noisy VCO for efficient time-domain simulation | 2004 | Centurelli, Francesco; A., Ercolani; Scotti, Giuseppe; Tommasino, Pasquale; Trifiletti, Alessandro | |
A Biasing Approach to design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs | 2022 | Centurelli, F.; Giustolisi, G.; Pennisi, S.; Scotti, G. |