In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.

A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate / Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro. - In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS. - ISSN 2079-9268. - 11:2(2021), pp. 1-15. [10.3390/jlpea11020019]

A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate

Centurelli, Francesco;Della Sala, Riccardo;Monsurrò, Pietro;Scotti, Giuseppe;Trifiletti, Alessandro
2021

Abstract

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.
2021
body-driven; ultra-low-voltage; ultra-low-power; operational transconductance amplifier; non-tailed differential pair; IoT
01 Pubblicazione su rivista::01a Articolo in rivista
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate / Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro. - In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS. - ISSN 2079-9268. - 11:2(2021), pp. 1-15. [10.3390/jlpea11020019]
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1542647
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