DELLA SALA, RICCARDO
DELLA SALA, RICCARDO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE, ELETTRONICA E TELECOMUNICAZIONI
A 0.15-to-0.5 V Body-Driven Dynamic Comparator with Rail-to-Rail ICMR
2023 DELLA SALA, Riccardo; Spinogatti, Valerio; Bocciarelli, Cristian; Centurelli, Francesco; Trifiletti, Alessandro
A 0.3 V OTA with enhanced CMRR and high robustness to PVT variations
2024 Della Sala, Riccardo; Centurelli, Francesco; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate
2021 Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3 V Three-Stage Body-Driven OTA
2023 Della Sala, Riccardo; Centurelli, Francesco; Monsurro, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3 V, rail-to-rail, ultralow-power, non-tailed, body-driven, sub-threshold amplifier
2021 Centurelli, Francesco; DELLA SALA, Riccardo; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations
2023 DELLA SALA, Riccardo; Centurelli, Francesco; Monsurro, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
A 2.5 GHz, 0.6 V body driven dynamic comparator exploiting charge pump based dynamic biasing
2023 Bocciarelli, C; Centurelli, F; Della Sala, R; Spinogatti, V; Trifiletti, A
A body-driven rail-to-rail 0.3 V operational transconductance amplifier exploiting current gain stages
2023 Della Sala, R; Centurelli, F; Monsurro, P; Scotti, G; Trifiletti, A
A Differential-to-Single-Ended Converter Based on Enhanced Body-Driven Current Mirrors Targeting Ultra-Low-Voltage OTAs
2022 DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe; Tommasino, Pasquale; Trifiletti, Alessandro
A High Performance 0.3 V Standard-Cell-Based OTA Suitable for Automatic Layout Flow
2023 DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe
A Lightweight {FPGA} Compatible Weak-{PUF} Primitive Based on {XOR} Gates
2022 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
A Monostable Physically Unclonable Function Based on Improved RCCMs with 0–1.56% Native Bit Instability at 0.6–1.2 V and 0–75 °C
2023 Della Sala, Riccardo; Bellizia, Davide; Centurelli, Francesco; Scotti, Giuseppe
A Novel differential to single-ended converter for ultra-low-voltage inverter-based OTAs
2022 DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe
A Novel High Performance Standard-Cell Based ULV OTA Exploiting an Improved Basic Amplifier
2024 Sala, Riccardo Della; Centurelli, Francesco; Scotti, Giuseppe
A novel OTA architecture exploiting current gain stages to boost bandwidth and slew-rate
2021 Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
A Novel Technique to Design Ultra-Low Voltage and Ultra-Low Power Inverter-Based OTAs
2024 Sala, Riccardo Della; Centurelli, Francesco; Scotti, Giuseppe
A novel ultra-compact FPGA PUF: The DD-PUF
2021 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
A Novel Ultra-Compact {FPGA}-Compatible {TRNG} Architecture Exploiting Latched Ring Oscillators
2022 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
A novel ultra-low voltage fully synthesizable comparator exploiting NAND gates
2023 Della Sala, R; Bocciarelli, C; Centurelli, F; Spinogatti, V; Trifiletti, A
A standard-cell-based CMFB for fully synthesizable OTAs
2022 Centurelli, Francesco; DELLA SALA, Riccardo; Scotti, Giuseppe
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
A 0.15-to-0.5 V Body-Driven Dynamic Comparator with Rail-to-Rail ICMR | 2023 | DELLA SALA, Riccardo; Spinogatti, Valerio; Bocciarelli, Cristian; Centurelli, Francesco; Trifiletti, Alessandro | |
A 0.3 V OTA with enhanced CMRR and high robustness to PVT variations | 2024 | Della Sala, Riccardo; Centurelli, Francesco; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate | 2021 | Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.3 V Three-Stage Body-Driven OTA | 2023 | Della Sala, Riccardo; Centurelli, Francesco; Monsurro, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.3 V, rail-to-rail, ultralow-power, non-tailed, body-driven, sub-threshold amplifier | 2021 | Centurelli, Francesco; DELLA SALA, Riccardo; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations | 2023 | DELLA SALA, Riccardo; Centurelli, Francesco; Monsurro, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro | |
A 2.5 GHz, 0.6 V body driven dynamic comparator exploiting charge pump based dynamic biasing | 2023 | Bocciarelli, C; Centurelli, F; Della Sala, R; Spinogatti, V; Trifiletti, A | |
A body-driven rail-to-rail 0.3 V operational transconductance amplifier exploiting current gain stages | 2023 | Della Sala, R; Centurelli, F; Monsurro, P; Scotti, G; Trifiletti, A | |
A Differential-to-Single-Ended Converter Based on Enhanced Body-Driven Current Mirrors Targeting Ultra-Low-Voltage OTAs | 2022 | DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe; Tommasino, Pasquale; Trifiletti, Alessandro | |
A High Performance 0.3 V Standard-Cell-Based OTA Suitable for Automatic Layout Flow | 2023 | DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe | |
A Lightweight {FPGA} Compatible Weak-{PUF} Primitive Based on {XOR} Gates | 2022 | DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe | |
A Monostable Physically Unclonable Function Based on Improved RCCMs with 0–1.56% Native Bit Instability at 0.6–1.2 V and 0–75 °C | 2023 | Della Sala, Riccardo; Bellizia, Davide; Centurelli, Francesco; Scotti, Giuseppe | |
A Novel differential to single-ended converter for ultra-low-voltage inverter-based OTAs | 2022 | DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe | |
A Novel High Performance Standard-Cell Based ULV OTA Exploiting an Improved Basic Amplifier | 2024 | Sala, Riccardo Della; Centurelli, Francesco; Scotti, Giuseppe | |
A novel OTA architecture exploiting current gain stages to boost bandwidth and slew-rate | 2021 | Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro | |
A Novel Technique to Design Ultra-Low Voltage and Ultra-Low Power Inverter-Based OTAs | 2024 | Sala, Riccardo Della; Centurelli, Francesco; Scotti, Giuseppe | |
A novel ultra-compact FPGA PUF: The DD-PUF | 2021 | DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe | |
A Novel Ultra-Compact {FPGA}-Compatible {TRNG} Architecture Exploiting Latched Ring Oscillators | 2022 | DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe | |
A novel ultra-low voltage fully synthesizable comparator exploiting NAND gates | 2023 | Della Sala, R; Bocciarelli, C; Centurelli, F; Spinogatti, V; Trifiletti, A | |
A standard-cell-based CMFB for fully synthesizable OTAs | 2022 | Centurelli, Francesco; DELLA SALA, Riccardo; Scotti, Giuseppe |