In this paper a novel 0.6 V dynamic biased, body driven Strong Arm latch is presented. The proposed topology exploits a charge pump based dynamic biasing configuration that boosts the effective supply headroom. In addition, the body terminals are used to drive the input pair while the gates are driven by the clock signal to allow for the removal of the tail transistor, resulting in larger peak currents and smaller parasitic capacitances. This reduces power consumption and delay. Moreover, the body driven approach enables rail-to-rail input common mode range (ICMR). As a result, the proposed topology is capable of high-speed operation (up to 2.5 GHz) despite the low supply voltage. At 2.5 GHz the comparator shows a competitive energy-delay product (EDP) of 2.98 fJ/GHz.

A 2.5 GHz, 0.6 V body driven dynamic comparator exploiting charge pump based dynamic biasing / Bocciarelli, C; Centurelli, F; Della Sala, R; Spinogatti, V; Trifiletti, A. - (2023), pp. 37-40. (Intervento presentato al convegno PRIME 23. 18th International conference on Ph.D. research in microelectronics and electronics tenutosi a Valencia; Spain) [10.1109/PRIME58259.2023.10161910].

A 2.5 GHz, 0.6 V body driven dynamic comparator exploiting charge pump based dynamic biasing

Bocciarelli, C;Centurelli, F;Della Sala, R;Spinogatti, V;Trifiletti, A
2023

Abstract

In this paper a novel 0.6 V dynamic biased, body driven Strong Arm latch is presented. The proposed topology exploits a charge pump based dynamic biasing configuration that boosts the effective supply headroom. In addition, the body terminals are used to drive the input pair while the gates are driven by the clock signal to allow for the removal of the tail transistor, resulting in larger peak currents and smaller parasitic capacitances. This reduces power consumption and delay. Moreover, the body driven approach enables rail-to-rail input common mode range (ICMR). As a result, the proposed topology is capable of high-speed operation (up to 2.5 GHz) despite the low supply voltage. At 2.5 GHz the comparator shows a competitive energy-delay product (EDP) of 2.98 fJ/GHz.
2023
PRIME 23. 18th International conference on Ph.D. research in microelectronics and electronics
dynamic comparator; dynamic bias; low voltage; strong arm latch; IoT
04 Pubblicazione in atti di convegno::04b Atto di convegno in volume
A 2.5 GHz, 0.6 V body driven dynamic comparator exploiting charge pump based dynamic biasing / Bocciarelli, C; Centurelli, F; Della Sala, R; Spinogatti, V; Trifiletti, A. - (2023), pp. 37-40. (Intervento presentato al convegno PRIME 23. 18th International conference on Ph.D. research in microelectronics and electronics tenutosi a Valencia; Spain) [10.1109/PRIME58259.2023.10161910].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1686619
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