A CMOS differential amplifier cell for minimum supply requirements is presented. The solution uses transistors in strong inversion and an original biasing scheme that exploits the bulk terminals of the transistor pair to accurately set the quiescent current and provide common-mode control. As a result, we avoid the use of the tail current source adopted in traditional differential stages. An implementation based on an auxiliary switched-capacitor network used in the feedback control loop is proposed and theoretically examined. Measurements on a prototype fabricated in a standard 0.35- $mu$m technology (with threshold voltages around 0.5 V) and powered with 1.2 V show an error in the bias current of about 15% with respect to the expected value. It was found that the obtained overall performance is comparable to that of a traditional long-tailed differential pair that uses a higher supply of 1.5 V. © 2006 IEEE.

Analysis and implementation of a minimum-supply body-biased CMOS differential amplifier cell / A. D., Grasso; Monsurro', Pietro; S., Pennisi; Scotti, Giuseppe; Trifiletti, Alessandro. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - 17:2(2009), pp. 172-180. [10.1109/tvlsi.2008.2003482]

Analysis and implementation of a minimum-supply body-biased CMOS differential amplifier cell

MONSURRO', PIETRO;SCOTTI, Giuseppe;TRIFILETTI, Alessandro
2009

Abstract

A CMOS differential amplifier cell for minimum supply requirements is presented. The solution uses transistors in strong inversion and an original biasing scheme that exploits the bulk terminals of the transistor pair to accurately set the quiescent current and provide common-mode control. As a result, we avoid the use of the tail current source adopted in traditional differential stages. An implementation based on an auxiliary switched-capacitor network used in the feedback control loop is proposed and theoretically examined. Measurements on a prototype fabricated in a standard 0.35- $mu$m technology (with threshold voltages around 0.5 V) and powered with 1.2 V show an error in the bias current of about 15% with respect to the expected value. It was found that the obtained overall performance is comparable to that of a traditional long-tailed differential pair that uses a higher supply of 1.5 V. © 2006 IEEE.
2009
body bias; cmos; common mode control; differential pair; low voltage
01 Pubblicazione su rivista::01a Articolo in rivista
Analysis and implementation of a minimum-supply body-biased CMOS differential amplifier cell / A. D., Grasso; Monsurro', Pietro; S., Pennisi; Scotti, Giuseppe; Trifiletti, Alessandro. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - 17:2(2009), pp. 172-180. [10.1109/tvlsi.2008.2003482]
File allegati a questo prodotto
Non ci sono file associati a questo prodotto.

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/230234
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo

Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 27
  • ???jsp.display-item.citation.isi??? 18
social impact