An analytical model to evaluate the hybrid architecture of a wide bandwidth high-speed digitizer is proposed. The model is based on the robust approach of multi-rate signal processing theory and allows analyzing the effects of the impairments that can affect the digitizer, and consequently evaluating achievable performance. The proposed model can also be used at design stage to identify viable solutions for counteracting the effects of the impairments. More specifically, it can be used to identify the correction filters that provide a digital representation of the input signal that minimizes spurious terms and distortions.

Multi-rate signal processing based model for high-speed digitizers / Monsurro, P.; Trifiletti, A.; Angrisani, L.; D'Arco, M.. - (2017), pp. 1-6. (Intervento presentato al convegno 2017 IEEE International Instrumentation and Measurement Technology Conference, I2MTC 2017 tenutosi a Politecnico di Torino, ita) [10.1109/I2MTC.2017.7969823].

Multi-rate signal processing based model for high-speed digitizers

Monsurro P.;Trifiletti A.;Angrisani L.;
2017

Abstract

An analytical model to evaluate the hybrid architecture of a wide bandwidth high-speed digitizer is proposed. The model is based on the robust approach of multi-rate signal processing theory and allows analyzing the effects of the impairments that can affect the digitizer, and consequently evaluating achievable performance. The proposed model can also be used at design stage to identify viable solutions for counteracting the effects of the impairments. More specifically, it can be used to identify the correction filters that provide a digital representation of the input signal that minimizes spurious terms and distortions.
2017
2017 IEEE International Instrumentation and Measurement Technology Conference, I2MTC 2017
analog-to-digital conversion; asynchronous time interleaving; digital bandwidth interleaving; digital storage oscilloscopes; time interleaving
04 Pubblicazione in atti di convegno::04b Atto di convegno in volume
Multi-rate signal processing based model for high-speed digitizers / Monsurro, P.; Trifiletti, A.; Angrisani, L.; D'Arco, M.. - (2017), pp. 1-6. (Intervento presentato al convegno 2017 IEEE International Instrumentation and Measurement Technology Conference, I2MTC 2017 tenutosi a Politecnico di Torino, ita) [10.1109/I2MTC.2017.7969823].
File allegati a questo prodotto
File Dimensione Formato  
Monsurrò_Multi-rate_2017.pdf

solo gestori archivio

Tipologia: Versione editoriale (versione pubblicata con il layout dell'editore)
Licenza: Tutti i diritti riservati (All rights reserved)
Dimensione 4.53 MB
Formato Adobe PDF
4.53 MB Adobe PDF   Contatta l'autore

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1558032
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 6
  • ???jsp.display-item.citation.isi??? 3
social impact