The use of capacitive sensors has advantages in different industrial applications due to their low cost and low-temperature dependence. In this sense, the current-mode approach by means of second-generation current conveyors (CCIIs) allows for improvements in key features, such as sensitivity and resolution. In this paper, a novel architecture of CCII for differential capacitive sensor interfaces is presented. The proposed topology shows a closed-loop configuration for both the voltage and the current buffer, thus leading to better interface impedances at terminals X and Z. Moreover, a low power consumption of 600 µW was obtained due to class-AB biasing of both buffers, and the inherent drawbacks in terms of linearity under the mismatch of class-AB buffering are overcome by its closed-loop configuration. The advantages of the novel architecture are demonstrated by circuit analysis and simulations; in particular, very good robustness under process, supply voltage and temperature variations and mismatches were obtained due to the closed-loop approach. The CCII was also used to design a capacitive sensor interface in integrated CMOS technology, where it was possible to achieve a sensitivity of 2.34 nA/fF, with a full-scale sensor variation of 8 pF and a minimum detectable capacitance difference of 40 fF.
A New Fully Closed-Loop, High-Precision, Class-AB CCII for Differential Capacitive Sensor Interfaces / Barile, G.; Centurelli, F.; Ferri, G.; Monsurro, P.; Pantoli, L.; Stornelli, V.; Tommasino, P.; Trifiletti, A.. - In: ELECTRONICS. - ISSN 2079-9292. - 11:6(2022), pp. 1-16. [10.3390/electronics11060903]
A New Fully Closed-Loop, High-Precision, Class-AB CCII for Differential Capacitive Sensor Interfaces
Centurelli F.;Monsurro P.;Tommasino P.;Trifiletti A.
2022
Abstract
The use of capacitive sensors has advantages in different industrial applications due to their low cost and low-temperature dependence. In this sense, the current-mode approach by means of second-generation current conveyors (CCIIs) allows for improvements in key features, such as sensitivity and resolution. In this paper, a novel architecture of CCII for differential capacitive sensor interfaces is presented. The proposed topology shows a closed-loop configuration for both the voltage and the current buffer, thus leading to better interface impedances at terminals X and Z. Moreover, a low power consumption of 600 µW was obtained due to class-AB biasing of both buffers, and the inherent drawbacks in terms of linearity under the mismatch of class-AB buffering are overcome by its closed-loop configuration. The advantages of the novel architecture are demonstrated by circuit analysis and simulations; in particular, very good robustness under process, supply voltage and temperature variations and mismatches were obtained due to the closed-loop approach. The CCII was also used to design a capacitive sensor interface in integrated CMOS technology, where it was possible to achieve a sensitivity of 2.34 nA/fF, with a full-scale sensor variation of 8 pF and a minimum detectable capacitance difference of 40 fF.File | Dimensione | Formato | |
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