We propose a linearization technique, for CMOS differential pairs employing resistive source degeneration, which exploits the bulks of the pair as additional control terminals. Simulations were performed using a 0.25-μm process, on an example design powered with 2.5V and 1 mA. Compared to the traditional source-degenerated transconductor, the proposed approach allows a THD reduction in the voltage-to-current conversion by 10dB, for an input differential signal of 0.5V pp and for frequencies up to 100MHz.
Source-degenerated CMOS transconductor with auxiliary linearization / Monsurro', Pietro; S., Pennisi; Scotti, Giuseppe; Trifiletti, Alessandro. - (2007), pp. 2240-2243. (Intervento presentato al convegno 2007 IEEE International Symposium on Circuits and Systems tenutosi a New Orleans; USA) [10.1109/iscas.2007.378728].
Source-degenerated CMOS transconductor with auxiliary linearization
MONSURRO', PIETRO;SCOTTI, Giuseppe;TRIFILETTI, Alessandro
2007
Abstract
We propose a linearization technique, for CMOS differential pairs employing resistive source degeneration, which exploits the bulks of the pair as additional control terminals. Simulations were performed using a 0.25-μm process, on an example design powered with 2.5V and 1 mA. Compared to the traditional source-degenerated transconductor, the proposed approach allows a THD reduction in the voltage-to-current conversion by 10dB, for an input differential signal of 0.5V pp and for frequencies up to 100MHz.| File | Dimensione | Formato | |
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