This paper presents a novel ultra-low-power ultra-low-voltage operational transconductance amplifier (OTA). The OTA operates with a 0.3V supply voltage and shows remarkable bandwidth performance with very limited power consumption, owing to the use of current mirrors with gain. Low impedance internal nodes of the current mirrors allow to boost gain and bandwidth, adding only high-frequency poles to the frequency response. Therefore, the compensation of the proposed OTA can be achieved through a dominant pole at the output, as in conventional cascode amplifiers. The circuit employs two identical input stages with cross-coupled inputs to improve common-mode rejection ratio (CMRR) performance, and a differential-to-single-ended output stage. The resulting architecture achieves a remarkable FOMS value, as demonstrated by the simulations performed in a commercial 130nm CMOS technology.

High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain / Della Sala, R.; Centurelli, F.; Monsurro, P.; Scotti, G.. - (2022), pp. 69-72. (Intervento presentato al convegno PRIME 22: 17th Conference on Ph.D. Research in Microelectronics and Electronics tenutosi a Villasimius) [10.1109/PRIME55000.2022.9816823].

High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain

Della Sala R.;Centurelli F.;Monsurro P.;Scotti G.
2022

Abstract

This paper presents a novel ultra-low-power ultra-low-voltage operational transconductance amplifier (OTA). The OTA operates with a 0.3V supply voltage and shows remarkable bandwidth performance with very limited power consumption, owing to the use of current mirrors with gain. Low impedance internal nodes of the current mirrors allow to boost gain and bandwidth, adding only high-frequency poles to the frequency response. Therefore, the compensation of the proposed OTA can be achieved through a dominant pole at the output, as in conventional cascode amplifiers. The circuit employs two identical input stages with cross-coupled inputs to improve common-mode rejection ratio (CMRR) performance, and a differential-to-single-ended output stage. The resulting architecture achieves a remarkable FOMS value, as demonstrated by the simulations performed in a commercial 130nm CMOS technology.
2022
PRIME 22: 17th Conference on Ph.D. Research in Microelectronics and Electronics
ultra-low-voltage; ultra-low-power; OTA; analog integrated circuits
04 Pubblicazione in atti di convegno::04b Atto di convegno in volume
High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain / Della Sala, R.; Centurelli, F.; Monsurro, P.; Scotti, G.. - (2022), pp. 69-72. (Intervento presentato al convegno PRIME 22: 17th Conference on Ph.D. Research in Microelectronics and Electronics tenutosi a Villasimius) [10.1109/PRIME55000.2022.9816823].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1652214
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