Catalogo dei prodotti della ricerca

MASTRANDREA, Antonio
 Distribuzione geografica
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Continente #
NA - Nord America 1.397
EU - Europa 895
AS - Asia 219
AF - Africa 7
SA - Sud America 7
Continente sconosciuto - Info sul continente non disponibili 3
OC - Oceania 2
Totale 2.530
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Nazione #
US - Stati Uniti d'America 1.378
IT - Italia 410
SE - Svezia 141
DE - Germania 102
SG - Singapore 80
CN - Cina 62
IN - India 59
UA - Ucraina 51
FI - Finlandia 49
GB - Regno Unito 28
NL - Olanda 22
RU - Federazione Russa 21
BG - Bulgaria 16
CA - Canada 15
ES - Italia 9
FR - Francia 9
RO - Romania 9
RS - Serbia 9
IE - Irlanda 6
BR - Brasile 4
KR - Corea 4
LU - Lussemburgo 4
MX - Messico 4
PL - Polonia 4
TR - Turchia 4
ZA - Sudafrica 4
CH - Svizzera 3
EU - Europa 3
AE - Emirati Arabi Uniti 2
LB - Libano 2
AR - Argentina 1
AU - Australia 1
CL - Cile 1
CO - Colombia 1
ID - Indonesia 1
IR - Iran 1
JP - Giappone 1
KH - Cambogia 1
LT - Lituania 1
LV - Lettonia 1
MU - Mauritius 1
MY - Malesia 1
NZ - Nuova Zelanda 1
SC - Seychelles 1
TN - Tunisia 1
VN - Vietnam 1
Totale 2.530
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Città #
Fairfield 241
Rome 214
Woodbridge 112
Chandler 110
Ashburn 107
Houston 101
Wilmington 91
Seattle 87
Cambridge 81
Singapore 43
Princeton 40
San Paolo di Civitate 33
Ann Arbor 32
Beijing 32
Helsinki 31
Plano 30
Lawrence 26
New York 25
San Diego 20
Milan 17
Millbury 16
Sofia 16
Andover 11
Dearborn 11
Southend 11
Meppel 10
Toronto 10
Belgrade 9
Boston 9
Norwalk 9
Des Moines 8
Redwood City 8
Turin 7
Cagliari 6
Dublin 6
Bühl 5
Fuzhou 5
London 5
Ottawa 5
Aprilia 4
Istanbul 4
Krakow 4
Kunming 4
Lappeenranta 4
Luxembourg 4
Mexico 4
Nanjing 4
Naples 4
Barcelona 3
Bilbao 3
Boardman 3
Frascati 3
Geneva 3
Genova 3
Jacksonville 3
Jinan 3
Phoenix 3
Suwon 3
Varedo 3
Westminster 3
Abu Dhabi 2
Albano Laziale 2
Belfast 2
Boca Raton 2
Bologna 2
Buccinasco 2
Chengdu 2
Dronten 2
Falls Church 2
Fasano 2
Fiumicino 2
Florence 2
Genoa 2
Hanover 2
Hyderabad 2
Jandira 2
Lugo 2
Muizenberg 2
Nahe 2
Noordwijk aan Zee 2
Orlando 2
Parets del Vallès 2
Pineto 2
Salerno 2
San Mateo 2
San Vittore 2
Shenyang 2
Slough 2
Vedano al Lambro 2
Agrigento 1
Akishima 1
Altenkirchen 1
Auckland 1
Austin 1
Baden 1
Baotou 1
Bogotá 1
Borca 1
Brusciano 1
Campobasso 1
Totale 1.781
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Nome #
Dosimetric characterization of an irradiation set-up for electronic components testing at the TOP-IMPLART proton linear accelerator 144
A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs 140
Variability aware modeling of SEU induced failure probability of logic circuit paths in static conditions 110
Geometry scaling impact on leakage currents in FinFET standard cells based on a logic-level leakage estimation technique 96
Combined Impact of NBTI Aging and Process Variations on Noise Margins of Flip-Flops 94
Impact of approximate memory data allocation on a H.264 software video encoder 89
A RISC-V fault-tolerant microcontroller core architecture based on a hardware thread full/partial protection and a thread-controlled Watch-dog timer 87
Effect of NBTI/PBTI aging and process variations on write failures in MOSFET and FinFET flip-flops 81
AppropinQuo: a platform emulator for exploring the approximate memory design space 81
Approximate memory support for Linux early allocators in ARM architectures 79
Synthesis time reconfigurable floating point unit for transprecision computing 79
Investigation on the optimal pipeline organization in RISC-V multi-threaded soft processor cores 78
Klessydra-T: Designing vector coprocessors for multithreaded edge-computing cores 78
An emulator for approximate memory platforms based on QEmu 76
Introducing approximate memory support in Linux Kernel 74
Full system emulation of approximate memory platforms with AppropinQuo 73
Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment 73
Logic Drivers: A Propagation Delay Modeling Paradigm for Statistical Simulation of Standard Cell Designs 66
The microarchitecture of a multi-threaded RISC-V compliant processing core family for IoT end-nodes 66
Quality aware approximate memory in RISC-V Linux Kernel 66
Novel approaches to quantify failure probability due to process variations in nano-scale CMOS logic 63
Optimal pipeline stage balancing in the presence of large isolated interconnect delay 62
Characterizing noise pulse effects on the power consumption of idle digital cells 62
Using safe operation regions to assess the error probability of logic circuits due to process variations 59
Customizable vector acceleration in extreme-edge computing. A risc-v software/hardware architecture study on VGG-16 implementation 57
Contextual bandits algorithms for reconfigurable hardware accelerators 55
Safe operation region characterization for quantifying the reliability of CMOS logic affected by process variations 53
Implementation of dynamic acceleration unit exchange on a RISC-V soft-processor 49
null 45
Efficient Mathematical Accelerator Design Coupled with an Interleaved Multi-threading RISC-V Microprocessor 39
Quality aware selective ECC for approximate DRAM 37
Statistical characterization, analysis and modeling of speed performance in digital standard cell designs subject to process variations 36
A delay model allowing nano-CMOS standard cells statistical simulation at the logic level 35
Contributions in evaluating the statistical impact of technology variations on delay and power dissipation of logic cells 32
A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design 28
Improving SET fault resilience by exploiting buffered DMR microarchitecture 26
Homogeneous Tightly-Coupled Dual Core Lock-Step with No Checkpointing Redundancy 25
Evaluation of Dynamic Triple Modular Redundancy in an Interleaved-Multi-Threading RISC-V Core 24
A general design methodology for synchronous early-completion-prediction adders in Nano-CMOS DSP architectures 22
Fault-tolerant hardware acceleration for high-performance edge-computing nodes 21
3D-Printed Face Mask with Integrated Sensors as Protective and Monitoring Tool 20
Automatic hardware accelerators reconfiguration through linearUCB algorithms on a RISC-V processor 18
Design and evaluation of buffered triple modular redundancy in interleaved-multi-threading processors 17
A new logic level delay modeling paradigm for nano-CMOS standard cell variation-aware simulation 17
Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration 16
An fpga-based risc-v computer architecture orbital laboratory on a pocketqube satellite 15
Characterization of Disposable Facemasks for COVID-19 Through Colorimetric Analysis 12
Measurements of exhaled CO2 through a novel telemedicine tool 8
A Simple Microwave Imaging System for Food Product Inspection through a Symmetry-Based Microwave Imaging Approach 8
A space-rated soft IP-core compatible with the PIC®hardware architecture and instruction set 6
null 5
Advancements in broadband electromagnetic sensing for food quality control 5
null 4
Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme 2
Totale 2.713
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Categoria #
all - tutte 8.068
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 8.068
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/2020574 0 37 15 33 60 57 82 95 80 46 35 34
2020/2021325 21 40 14 12 13 51 7 19 41 64 17 26
2021/2022367 8 23 43 24 51 10 8 47 20 27 48 58
2022/2023556 92 103 45 17 38 63 16 51 56 15 23 37
2023/2024454 40 49 31 14 35 64 46 51 9 28 46 41
2024/202551 47 4 0 0 0 0 0 0 0 0 0 0
Totale 2.713