MASTRANDREA, Antonio
MASTRANDREA, Antonio
DIPARTIMENTO DI SCIENZE STATISTICHE
3D-Printed Face Mask with Integrated Sensors as Protective and Monitoring Tool
2023 Casalinuovo, Silvia; Buzzin, Alessio; Mastrandrea, Antonio; Mazzetta, Ivan; Barbirotta, Marcello; Iannascoli, Lorenzo; Nascetti, Augusto; de Cesare, Giampiero; Puglisi, Donatella; Caputo, Domenico
A delay model allowing nano-CMOS standard cells statistical simulation at the logic level
2011 Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design
2021 Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Vigli, Francesco; Olivieri, Mauro
A general design methodology for synchronous early-completion-prediction adders in Nano-CMOS DSP architectures
2013 Olivieri, Mauro; Mastrandrea, Antonio
A new logic level delay modeling paradigm for nano-CMOS standard cell variation-aware simulation
2012 Mastrandrea, Antonio; Olivieri, Mauro
A PULP-based Parallel Power Controller for Future Exascale Systems
2019 Bartolini, Andrea; Rossi, Davide; Mastrandrea, Antonio; Conficoni, Christian; Benatti, Simone; Tilli, Andrea; Benini, Luca
A RISC-V fault-tolerant microcontroller core architecture based on a hardware thread full/partial protection and a thread-controlled Watch-dog timer
2020 Blasi, L.; Vigli, F.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Olivieri, M.
A RISC-V fault-tolerant soft-processor based on full/partial heterogeneous dual-core protection
2024 Vigli, Francesco; Barbirotta, Marcello; Cheikh, Abdallah; Menichelli, Francesco; Mastrandrea, Antonio; Olivieri, Mauro
A Simple Microwave Imaging System for Food Product Inspection through a Symmetry-Based Microwave Imaging Approach
2024 Bellizzi, G.; Buzzin, A.; Crocco, L.; Mastrandrea, A.; Zeni, N.; Zumbo, S.; Cavagnaro, M.
A space-rated soft IP-core compatible with the PIC®hardware architecture and instruction set
2018 Blasi, L.; Mastrandrea, A.; Menichelli, F.; Olivieri, M.
A universal hardware emulator for verification IPs on FPGA: a novel and low-cost approach
2024 Jamili, Saeid; Mastrandrea, Antonio; Cheikh, Abdallah; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro
A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs
2014 Abbas, Zia; Mastrandrea, Antonio; Olivieri, Mauro
Advancements in broadband electromagnetic sensing for food quality control
2024 Zappia, S.; Zumbo, S.; Zeni, N.; Buzzin, A.; Mastrandrea, A.; Ricci, M.; Catapano, I.; Scapaticci, R.; Pasquino, N.; Lovecchio, N.; Vasquez, J. A. T.; Bellizzi, G.; Cavagnaro, M.; Vipiana, F.; Crocco, L.
AeneasHDC: an automatic framework for deploying hyperdimensional computing models on FPGAs
2024 Angioli, Marco; Jamili, Saeid; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Rosato, Antonello; Olivieri, Mauro
An emulator for approximate memory platforms based on QEmu
2017 Menichelli, Francesco; Stazi, Giulia; Mastrandrea, Antonio; Olivieri, Mauro
An fpga-based risc-v computer architecture orbital laboratory on a pocketqube satellite
2020 Blasi, L.; Vigli, F.; Farissi, S. M.; Mastrandrea, A.; Menichelli, F.; Nascetti, A.; Olivieri, M.
Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration
2022 Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
AppropinQuo: a platform emulator for exploring the approximate memory design space
2018 Stazi, G; Mastrandrea, A; Olivieri, M; Menichelli, F
Approximate memory support for Linux early allocators in ARM architectures
2019 Stazi, G.; Mastrandrea, A.; Olivieri, M.; Menichelli, F.
Automatic hardware accelerators reconfiguration through linearUCB algorithms on a RISC-V processor
2023 Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Jamili, Saeid; Olivieri, Mauro
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| 3D-Printed Face Mask with Integrated Sensors as Protective and Monitoring Tool | 2023 | Casalinuovo, Silvia; Buzzin, Alessio; Mastrandrea, Antonio; Mazzetta, Ivan; Barbirotta, Marcello; Iannascoli, Lorenzo; Nascetti, Augusto; de Cesare, Giampiero; Puglisi, Donatella; Caputo, Domenico | |
| A delay model allowing nano-CMOS standard cells statistical simulation at the logic level | 2011 | Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro | |
| A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design | 2021 | Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Vigli, Francesco; Olivieri, Mauro | |
| A general design methodology for synchronous early-completion-prediction adders in Nano-CMOS DSP architectures | 2013 | Olivieri, Mauro; Mastrandrea, Antonio | |
| A new logic level delay modeling paradigm for nano-CMOS standard cell variation-aware simulation | 2012 | Mastrandrea, Antonio; Olivieri, Mauro | |
| A PULP-based Parallel Power Controller for Future Exascale Systems | 2019 | Bartolini, Andrea; Rossi, Davide; Mastrandrea, Antonio; Conficoni, Christian; Benatti, Simone; Tilli, Andrea; Benini, Luca | |
| A RISC-V fault-tolerant microcontroller core architecture based on a hardware thread full/partial protection and a thread-controlled Watch-dog timer | 2020 | Blasi, L.; Vigli, F.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Olivieri, M. | |
| A RISC-V fault-tolerant soft-processor based on full/partial heterogeneous dual-core protection | 2024 | Vigli, Francesco; Barbirotta, Marcello; Cheikh, Abdallah; Menichelli, Francesco; Mastrandrea, Antonio; Olivieri, Mauro | |
| A Simple Microwave Imaging System for Food Product Inspection through a Symmetry-Based Microwave Imaging Approach | 2024 | Bellizzi, G.; Buzzin, A.; Crocco, L.; Mastrandrea, A.; Zeni, N.; Zumbo, S.; Cavagnaro, M. | |
| A space-rated soft IP-core compatible with the PIC®hardware architecture and instruction set | 2018 | Blasi, L.; Mastrandrea, A.; Menichelli, F.; Olivieri, M. | |
| A universal hardware emulator for verification IPs on FPGA: a novel and low-cost approach | 2024 | Jamili, Saeid; Mastrandrea, Antonio; Cheikh, Abdallah; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro | |
| A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs | 2014 | Abbas, Zia; Mastrandrea, Antonio; Olivieri, Mauro | |
| Advancements in broadband electromagnetic sensing for food quality control | 2024 | Zappia, S.; Zumbo, S.; Zeni, N.; Buzzin, A.; Mastrandrea, A.; Ricci, M.; Catapano, I.; Scapaticci, R.; Pasquino, N.; Lovecchio, N.; Vasquez, J. A. T.; Bellizzi, G.; Cavagnaro, M.; Vipiana, F.; Crocco, L. | |
| AeneasHDC: an automatic framework for deploying hyperdimensional computing models on FPGAs | 2024 | Angioli, Marco; Jamili, Saeid; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Rosato, Antonello; Olivieri, Mauro | |
| An emulator for approximate memory platforms based on QEmu | 2017 | Menichelli, Francesco; Stazi, Giulia; Mastrandrea, Antonio; Olivieri, Mauro | |
| An fpga-based risc-v computer architecture orbital laboratory on a pocketqube satellite | 2020 | Blasi, L.; Vigli, F.; Farissi, S. M.; Mastrandrea, A.; Menichelli, F.; Nascetti, A.; Olivieri, M. | |
| Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration | 2022 | Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro | |
| AppropinQuo: a platform emulator for exploring the approximate memory design space | 2018 | Stazi, G; Mastrandrea, A; Olivieri, M; Menichelli, F | |
| Approximate memory support for Linux early allocators in ARM architectures | 2019 | Stazi, G.; Mastrandrea, A.; Olivieri, M.; Menichelli, F. | |
| Automatic hardware accelerators reconfiguration through linearUCB algorithms on a RISC-V processor | 2023 | Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Jamili, Saeid; Olivieri, Mauro |