ABBAS, ZIA

ABBAS, ZIA  

DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE, ELETTRONICA E TELECOMUNICAZIONI  

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Titolo Data di pubblicazione Autore(i) File
A novel logic level calculation model for leakage currents in digital nano-CMOS circuits 2011 Abbas, Zia; Vanni, Genua; Olivieri, Mauro
A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs 2014 Abbas, Zia; Mastrandrea, Antonio; Olivieri, Mauro
Current controlled current conveyor (CCCII) and application using 65nm CMOS technology 2011 Abbas, Zia; Scotti, Giuseppe; Olivieri, Mauro
Design and Fabrication of Microfluidic Chip for Temperature Control Applications in Biomedical 2023 Zahra, A.; De Cesare, G.; Caputo, D.; Lovecchio, N.; Bhimalapuram, P.; Azeemuddin, S.; Abbas, Z.
Design centering/yield optimization of power aware band pass filter based on CMOS current controlled current conveyor (CCCII+) 2013 Abbas, Zia; Olivieri, Mauro; Marat, Yakupov; Andreas, Ripp
Geometry scaling impact on leakage currents in FinFET standard cells based on a logic-level leakage estimation technique 2018 Abbas, Zia; Zahra, Andleeb; Olivieri, Mauro; Mastrandrea, Antonio
Impact of technology scaling on leakage power in nano-scale bulk CMOS digital standard cells 2014 Abbas, Zia; Olivieri, Mauro
LEADER: Leakage currents estimation technique for aging degradation aware 16 nm CMOS circuits 2019 Abbas, Z.; Zahra, A.; Olivieri, M.
Optimal NBTI degradation and PVT variation resistant device sizing in a full adder cell 2015 Abbas, Zia; Olivieri, Mauro; Khalid, Usman; Ripp, Andreas; Pronath, Michael
Optimal transistor sizing for maximum yield in variation-aware standard cell design 2016 Abbas, Zia; Olivieri, Mauro
Sizing and optimization of low power process variation aware standard cells 2013 ABBAS, ZIA; KHALID, USMAN; OLIVIERI, Mauro
Variability aware modeling of SEU induced failure probability of logic circuit paths in static conditions 2015 Khalid, Usman; Mastrandrea, Antonio; Abbas, Zia; Olivieri, Mauro
Yield optimization for low power current controlled current conveyor 2012 Abbas, Zia; M., Yakupov; Olivieri, Mauro; A., Ripp; G., Strobe
Yield-driven power-delay-optimal CMOS full-adder design complying with automotive product specifications of PVT variations and NBTI degradations 2016 Abbas, Zia; Olivieri, Mauro; Ripp, Andreas