ANGIOLI, MARCO
ANGIOLI, MARCO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE, ELETTRONICA E TELECOMUNICAZIONI
A General-Purpose AXI Plug-and-Play Hyperdimensional Computing Accelerator
2026 Martino, Rocco; Pisani, Marco; Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Rosato, Antonello; Olivieri, Mauro
A novel machine learning framework for drowsiness detection using an electrostatic wearable sensor and hyperdimensional computing
2025 Ferri, L.; Di Cotrone, M. G. P.; Angioli, M.; Balsi, M.; Suppa, A.; Davi, L.; Picozzi, N.; Gumiero, A.; Torre, L. D.; Irrera, F.
A universal hardware emulator for verification IPs on FPGA: a novel and low-cost approach
2024 Jamili, Saeid; Mastrandrea, Antonio; Cheikh, Abdallah; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro
AeneasHDC: an automatic framework for deploying hyperdimensional computing models on FPGAs
2024 Angioli, Marco; Jamili, Saeid; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Rosato, Antonello; Olivieri, Mauro
Automatic hardware accelerators reconfiguration through linearUCB algorithms on a RISC-V processor
2023 Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Jamili, Saeid; Olivieri, Mauro
Configurable Hardware Acceleration for Hyperdimensional Computing Extension on RISC-V
2026 Martino, R.; Angioli, M.; Rosato, A.; Barbirotta, M.; Cheikh, A.; Olivieri, M.
Contextual bandits algorithms for reconfigurable hardware accelerators
2023 Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro
Design, implementation and evaluation of a new variable latency integer division scheme
2024 Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro
Dual-modular-redundancy voting circuits for single-event-transient mitigation
2024 Barbirotta, M.; Angioli, M.; Mastrandrea, A.; Menichelli, F.; Cheikh, A.; Olivieri, M.
Dynamic triple modular redundancy in interleaved hardware threads: an alternative solution to lockstep multi-cores for fault-tolerant systems
2024 Barbirotta, Marcello; Menichelli, Francesco; Cheikh, Abdallah; Mastrandrea, Antonio; Angioli, Marco; Olivieri, Mauro
Efficient implementation of linearUCB through algorithmic improvements and vector computing acceleration for embedded learning systems
2025 Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
Fault tolerant voting circuits. A dual-modular-redundancy approach for single-event-transient mitigation
2025 Barbirotta, Marcello; Angioli, Marco; Mastrandrea, Antonio; Menichelli, Francesco; Pisani, Marco; Olivieri, Mauro
Fault-tolerant hardware acceleration for high-performance edge-computing nodes
2023 Barbirotta, M.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Angioli, M.; Jamili, S.; Olivieri, M.
HD-CB: The First Exploration of Hyperdimensional Computing for Contextual Bandits Problems
2026 Angioli, M.; Rosato, A.; Barbirotta, M.; Martino, R.; Menichelli, F.; Olivieri, M.
Heterogeneous tightly-coupled dual core architecture against single event effects
2024 Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Angioli, Marco; Jamili, Saeid; Olivieri, Mauro
Homogeneous Tightly-Coupled Dual Core Lock-Step with No Checkpointing Redundancy
2023 Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Jamili, Saeid; Angioli, Marco; Olivieri, Mauro
Implementation of dynamic acceleration unit exchange on a RISC-V soft-processor
2023 Jamili, Saeid; Cheikh, Abdallah; Mastrandrea, Antonio; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro
Single event transient reliability analysis on a fault-tolerant RISC-V microprocessor design
2024 Barbirotta, Marcello; Angioli, Marco; Mastrandrea, Antonio; Cheikh, Abdallah; Jamili, Saeid; Menichelli, Francesco; Olivieri, Mauro
Special session. SE-UVM, an integrated simulation environment for single event induced failures characterization and its application to the CV32E40P processor
2024 Barbirotta, M.; Angioli, M.; Mastrandrea, A.; Menichelli, F.; Cheikh, A.; Olivieri, M.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| A General-Purpose AXI Plug-and-Play Hyperdimensional Computing Accelerator | 2026 | Martino, Rocco; Pisani, Marco; Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Rosato, Antonello; Olivieri, Mauro | |
| A novel machine learning framework for drowsiness detection using an electrostatic wearable sensor and hyperdimensional computing | 2025 | Ferri, L.; Di Cotrone, M. G. P.; Angioli, M.; Balsi, M.; Suppa, A.; Davi, L.; Picozzi, N.; Gumiero, A.; Torre, L. D.; Irrera, F. | |
| A universal hardware emulator for verification IPs on FPGA: a novel and low-cost approach | 2024 | Jamili, Saeid; Mastrandrea, Antonio; Cheikh, Abdallah; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro | |
| AeneasHDC: an automatic framework for deploying hyperdimensional computing models on FPGAs | 2024 | Angioli, Marco; Jamili, Saeid; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Rosato, Antonello; Olivieri, Mauro | |
| Automatic hardware accelerators reconfiguration through linearUCB algorithms on a RISC-V processor | 2023 | Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Jamili, Saeid; Olivieri, Mauro | |
| Configurable Hardware Acceleration for Hyperdimensional Computing Extension on RISC-V | 2026 | Martino, R.; Angioli, M.; Rosato, A.; Barbirotta, M.; Cheikh, A.; Olivieri, M. | |
| Contextual bandits algorithms for reconfigurable hardware accelerators | 2023 | Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro | |
| Design, implementation and evaluation of a new variable latency integer division scheme | 2024 | Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro | |
| Dual-modular-redundancy voting circuits for single-event-transient mitigation | 2024 | Barbirotta, M.; Angioli, M.; Mastrandrea, A.; Menichelli, F.; Cheikh, A.; Olivieri, M. | |
| Dynamic triple modular redundancy in interleaved hardware threads: an alternative solution to lockstep multi-cores for fault-tolerant systems | 2024 | Barbirotta, Marcello; Menichelli, Francesco; Cheikh, Abdallah; Mastrandrea, Antonio; Angioli, Marco; Olivieri, Mauro | |
| Efficient implementation of linearUCB through algorithmic improvements and vector computing acceleration for embedded learning systems | 2025 | Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro | |
| Fault tolerant voting circuits. A dual-modular-redundancy approach for single-event-transient mitigation | 2025 | Barbirotta, Marcello; Angioli, Marco; Mastrandrea, Antonio; Menichelli, Francesco; Pisani, Marco; Olivieri, Mauro | |
| Fault-tolerant hardware acceleration for high-performance edge-computing nodes | 2023 | Barbirotta, M.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Angioli, M.; Jamili, S.; Olivieri, M. | |
| HD-CB: The First Exploration of Hyperdimensional Computing for Contextual Bandits Problems | 2026 | Angioli, M.; Rosato, A.; Barbirotta, M.; Martino, R.; Menichelli, F.; Olivieri, M. | |
| Heterogeneous tightly-coupled dual core architecture against single event effects | 2024 | Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Angioli, Marco; Jamili, Saeid; Olivieri, Mauro | |
| Homogeneous Tightly-Coupled Dual Core Lock-Step with No Checkpointing Redundancy | 2023 | Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Jamili, Saeid; Angioli, Marco; Olivieri, Mauro | |
| Implementation of dynamic acceleration unit exchange on a RISC-V soft-processor | 2023 | Jamili, Saeid; Cheikh, Abdallah; Mastrandrea, Antonio; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro | |
| Single event transient reliability analysis on a fault-tolerant RISC-V microprocessor design | 2024 | Barbirotta, Marcello; Angioli, Marco; Mastrandrea, Antonio; Cheikh, Abdallah; Jamili, Saeid; Menichelli, Francesco; Olivieri, Mauro | |
| Special session. SE-UVM, an integrated simulation environment for single event induced failures characterization and its application to the CV32E40P processor | 2024 | Barbirotta, M.; Angioli, M.; Mastrandrea, A.; Menichelli, F.; Cheikh, A.; Olivieri, M. |