BARBIROTTA, MARCELLO
BARBIROTTA, MARCELLO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE, ELETTRONICA E TELECOMUNICAZIONI
3D-Printed Face Mask with Integrated Sensors as Protective and Monitoring Tool
2023 Casalinuovo, Silvia; Buzzin, Alessio; Mastrandrea, Antonio; Mazzetta, Ivan; Barbirotta, Marcello; Iannascoli, Lorenzo; Nascetti, Augusto; de Cesare, Giampiero; Puglisi, Donatella; Caputo, Domenico
A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design
2021 Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Vigli, Francesco; Olivieri, Mauro
A RISC-V fault-tolerant soft-processor based on full/partial heterogeneous dual-core protection
2024 Vigli, Francesco; Barbirotta, Marcello; Cheikh, Abdallah; Menichelli, Francesco; Mastrandrea, Antonio; Olivieri, Mauro
A universal hardware emulator for verification IPs on FPGA: a novel and low-cost approach
2024 Jamili, Saeid; Mastrandrea, Antonio; Cheikh, Abdallah; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro
ADMM consensus for deep LSTM networks
2020 Rosato, A.; Succetti, F.; Barbirotta, M.; Panella, M.
AeneasHDC: an automatic framework for deploying hyperdimensional computing models on FPGAs
2024 Angioli, Marco; Jamili, Saeid; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Rosato, Antonello; Olivieri, Mauro
Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration
2022 Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
Automatic hardware accelerators reconfiguration through linearUCB algorithms on a RISC-V processor
2023 Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Jamili, Saeid; Olivieri, Mauro
Contextual bandits algorithms for reconfigurable hardware accelerators
2023 Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro
Design and evaluation of buffered triple modular redundancy in interleaved-multi-threading processors
2022 Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
Design, implementation and evaluation of a new variable latency integer division scheme
2024 Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro
Dynamic triple modular redundancy in interleaved hardware threads: an alternative solution to lockstep multi-cores for fault-tolerant systems
2024 Barbirotta, Marcello; Menichelli, Francesco; Cheikh, Abdallah; Mastrandrea, Antonio; Angioli, Marco; Olivieri, Mauro
Evaluation of Dynamic Triple Modular Redundancy in an Interleaved-Multi-Threading RISC-V Core
2022 Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Ottavi, Marco; Olivieri, Mauro
Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment
2020 Barbirotta, M.; Mastrandrea, A.; Menichelli, F.; Vigli, F.; Blasi, L.; Cheikh, A.; Sordillo, S.; Di Gennaro, F.; Olivieri, M.
Fault-tolerant hardware acceleration for high-performance edge-computing nodes
2023 Barbirotta, M.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Angioli, M.; Jamili, S.; Olivieri, M.
Heterogeneous tightly-coupled dual core architecture against single event effects
2024 Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Angioli, Marco; Jamili, Saeid; Olivieri, Mauro
Homogeneous Tightly-Coupled Dual Core Lock-Step with No Checkpointing Redundancy
2023 Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Jamili, Saeid; Angioli, Marco; Olivieri, Mauro
Implementation of dynamic acceleration unit exchange on a RISC-V soft-processor
2023 Jamili, Saeid; Cheikh, Abdallah; Mastrandrea, Antonio; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro
Improving SET fault resilience by exploiting buffered DMR microarchitecture
2023 Barbirotta, Marcello; Mastrandrea, Antonio; Cheikh, Abdallah; Menichelli, Francesco; Olivieri, Mauro
Measurements of exhaled CO2 through a novel telemedicine tool
2024 Casalinuovo, S.; Buzzin, A.; Barbirotta, M.; Mastrandrea, A.; Puglisi, D.; de Cesare, G.; Caputo, D.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| 3D-Printed Face Mask with Integrated Sensors as Protective and Monitoring Tool | 2023 | Casalinuovo, Silvia; Buzzin, Alessio; Mastrandrea, Antonio; Mazzetta, Ivan; Barbirotta, Marcello; Iannascoli, Lorenzo; Nascetti, Augusto; de Cesare, Giampiero; Puglisi, Donatella; Caputo, Domenico | |
| A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design | 2021 | Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Vigli, Francesco; Olivieri, Mauro | |
| A RISC-V fault-tolerant soft-processor based on full/partial heterogeneous dual-core protection | 2024 | Vigli, Francesco; Barbirotta, Marcello; Cheikh, Abdallah; Menichelli, Francesco; Mastrandrea, Antonio; Olivieri, Mauro | |
| A universal hardware emulator for verification IPs on FPGA: a novel and low-cost approach | 2024 | Jamili, Saeid; Mastrandrea, Antonio; Cheikh, Abdallah; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro | |
| ADMM consensus for deep LSTM networks | 2020 | Rosato, A.; Succetti, F.; Barbirotta, M.; Panella, M. | |
| AeneasHDC: an automatic framework for deploying hyperdimensional computing models on FPGAs | 2024 | Angioli, Marco; Jamili, Saeid; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Rosato, Antonello; Olivieri, Mauro | |
| Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration | 2022 | Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro | |
| Automatic hardware accelerators reconfiguration through linearUCB algorithms on a RISC-V processor | 2023 | Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Jamili, Saeid; Olivieri, Mauro | |
| Contextual bandits algorithms for reconfigurable hardware accelerators | 2023 | Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro | |
| Design and evaluation of buffered triple modular redundancy in interleaved-multi-threading processors | 2022 | Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro | |
| Design, implementation and evaluation of a new variable latency integer division scheme | 2024 | Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro | |
| Dynamic triple modular redundancy in interleaved hardware threads: an alternative solution to lockstep multi-cores for fault-tolerant systems | 2024 | Barbirotta, Marcello; Menichelli, Francesco; Cheikh, Abdallah; Mastrandrea, Antonio; Angioli, Marco; Olivieri, Mauro | |
| Evaluation of Dynamic Triple Modular Redundancy in an Interleaved-Multi-Threading RISC-V Core | 2022 | Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Ottavi, Marco; Olivieri, Mauro | |
| Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment | 2020 | Barbirotta, M.; Mastrandrea, A.; Menichelli, F.; Vigli, F.; Blasi, L.; Cheikh, A.; Sordillo, S.; Di Gennaro, F.; Olivieri, M. | |
| Fault-tolerant hardware acceleration for high-performance edge-computing nodes | 2023 | Barbirotta, M.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Angioli, M.; Jamili, S.; Olivieri, M. | |
| Heterogeneous tightly-coupled dual core architecture against single event effects | 2024 | Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Angioli, Marco; Jamili, Saeid; Olivieri, Mauro | |
| Homogeneous Tightly-Coupled Dual Core Lock-Step with No Checkpointing Redundancy | 2023 | Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Jamili, Saeid; Angioli, Marco; Olivieri, Mauro | |
| Implementation of dynamic acceleration unit exchange on a RISC-V soft-processor | 2023 | Jamili, Saeid; Cheikh, Abdallah; Mastrandrea, Antonio; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro | |
| Improving SET fault resilience by exploiting buffered DMR microarchitecture | 2023 | Barbirotta, Marcello; Mastrandrea, Antonio; Cheikh, Abdallah; Menichelli, Francesco; Olivieri, Mauro | |
| Measurements of exhaled CO2 through a novel telemedicine tool | 2024 | Casalinuovo, S.; Buzzin, A.; Barbirotta, M.; Mastrandrea, A.; Puglisi, D.; de Cesare, G.; Caputo, D. |