MENICHELLI, FRANCESCO
MENICHELLI, FRANCESCO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE, ELETTRONICA E TELECOMUNICAZIONI
A class of code compression schemes for reducing power consumption in embedded microprocessor systems
2004 L., Benini; Menichelli, Francesco; Olivieri, Mauro
A delay model allowing nano-CMOS standard cells statistical simulation at the logic level
2011 Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design
2021 Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Vigli, Francesco; Olivieri, Mauro
A flexible SystemC simulator for multiprocessor systems-on-chip
2002 Menichelli, Francesco; D., Bertozzi; L., Benini; Olivieri, Mauro
A model-based methodology to generate code for timer units
2016 Marazza, Marco; Menichelli, Francesco; Olivieri, Mauro; Ferrante, Orlando; Ferrari, Alberto
A new algorithm for convergence verification in circuit level simulations
2014 Lannutti, Francesco; Menichelli, Francesco; Nenzi, Paolo; Olivieri, Mauro
A platform-based emulator for mass-storage flash cards evaluation in embedded systems
2016 Menichelli, Francesco; Olivieri, Mauro
A post-compiler approach to scratchpad mapping of code
2004 Angiolini, Federico; Menichelli, Francesco; Ferrero, Alberto; Benini, Luca; Olivieri, Mauro
A regulation-based security evaluation method for data link in wireless sensor network
2014 Malavenda, CLAUDIO SANTO; Menichelli, Francesco; Olivieri, Mauro
A RISC-V fault-tolerant microcontroller core architecture based on a hardware thread full/partial protection and a thread-controlled Watch-dog timer
2020 Blasi, L.; Vigli, F.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Olivieri, M.
A simulation-based power-aware architecture exploration of a multiprocessor system-on-chip design
2004 Menichelli, Francesco; Olivieri, Mauro; L., Benini; M., Donno; L., Bisdounis
A space-rated soft IP-core compatible with the PIC®hardware architecture and instruction set
2018 Blasi, L.; Mastrandrea, A.; Menichelli, F.; Olivieri, M.
An emulator for approximate memory platforms based on QEmu
2017 Menichelli, Francesco; Stazi, Giulia; Mastrandrea, Antonio; Olivieri, Mauro
An fpga-based risc-v computer architecture orbital laboratory on a pocketqube satellite
2020 Blasi, L.; Vigli, F.; Farissi, S. M.; Mastrandrea, A.; Menichelli, F.; Nascetti, A.; Olivieri, M.
Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration
2022 Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
AppropinQuo: a platform emulator for exploring the approximate memory design space
2018 Stazi, G; Mastrandrea, A; Olivieri, M; Menichelli, F
Approximate memory support for Linux early allocators in ARM architectures
2019 Stazi, G.; Mastrandrea, A.; Olivieri, M.; Menichelli, F.
Characterizing noise pulse effects on the power consumption of idle digital cells
2018 Olivieri, M.; Khalid, U.; Mastrandrea, A.; Menichelli, F.
Contextual bandits algorithms for reconfigurable hardware accelerators
2023 Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro
Contributions in evaluating the statistical impact of technology variations on delay and power dissipation of logic cells
2010 Olivieri, Mauro; Menichelli, Francesco; Mastrandrea, Antonio; Nenzi, Paolo