The low-voltage powerline communication (PLC) field constitutes today a hot open research area. Powerlines, that often already exist to support energy distribution, can provide an economical broadband medium for high-speed reliable communication traffic, not only for equipment monitoring, protection, and control purposes, but especially today for supporting the smart home technology. However, despite several attractions, the low-voltage electrical network provides an unfriendly environment for data communications. Besides interferences, noise, attenuation, and multi-path reflections, the extremes as well as the unpredictability of the access impedance are limiting factors in the performance of PLCs. This paper presents a preliminary study about a possible methodology of designing an optimal broadband impedance matching circuit (BIM) for providing gain equalization and mitigation of the effects of low-impedance loads on the PLC modem in a wide frequency range. The design is achieved in successive steps by means of the Vector Fitting method, rational parametric approximation of the driving impedance and nonlinear optimization through a novel Meta Particle Swarm Optimization (MPSO). © 2009 IEEE.
Design of impedance matching couplers for power line communications / Araneo, Rodolfo; Celozzi, Salvatore; Lovat, Giampiero. - ELETTRONICO. - (2009), pp. 64-69. (Intervento presentato al convegno 2009 IEEE International Symposium on Electromagnetic Compatibility, EMC 2009 tenutosi a Austin, TX nel 17 August 2009 through 21 August 2009) [10.1109/isemc.2009.5284630].
Design of impedance matching couplers for power line communications
ARANEO, Rodolfo;CELOZZI, Salvatore;LOVAT, GIAMPIERO
2009
Abstract
The low-voltage powerline communication (PLC) field constitutes today a hot open research area. Powerlines, that often already exist to support energy distribution, can provide an economical broadband medium for high-speed reliable communication traffic, not only for equipment monitoring, protection, and control purposes, but especially today for supporting the smart home technology. However, despite several attractions, the low-voltage electrical network provides an unfriendly environment for data communications. Besides interferences, noise, attenuation, and multi-path reflections, the extremes as well as the unpredictability of the access impedance are limiting factors in the performance of PLCs. This paper presents a preliminary study about a possible methodology of designing an optimal broadband impedance matching circuit (BIM) for providing gain equalization and mitigation of the effects of low-impedance loads on the PLC modem in a wide frequency range. The design is achieved in successive steps by means of the Vector Fitting method, rational parametric approximation of the driving impedance and nonlinear optimization through a novel Meta Particle Swarm Optimization (MPSO). © 2009 IEEE.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
