Evaluation and comparison of physical unclonable functions suitable for FPGA implementation

In this study, cutting-edge FPGA-based Physical Unclonable Functions (PUFs) are analyzed and compared. We present measurements results on some of the most popular FPGA-oriented weak PUF architectures taken from the literature, in order to compare them in terms of statistical performance, resources usage, and the different tradeoffs achieved. Six PUF primitives, namely the DD-PUF, the NAND-PUF, the XOR-PUF, the PICO-PUF, the TERO-PUF, and the SS-RO-PUF have been implemented on the same AMD-Xilinx Artix-7 FPGA device, and measurements on 16 FPGA boards are provided for the comparisons. An evaluation of performance variations under different supply voltage and temperature conditions is presented. The statistical performance of the different PUFs is assessed by using the National Institute of Standards and Technology (NIST) tests to quantify the achieved randomness. The comparison is based also on a Figure of Merit which accounts for the tradeoff between statistical performance and resources usage.