This paper presents a fully synthesizable three-stage inverter-based operational transconductance amplifier (OTA) featuring a 3-bit digitally reconfigurable output stage for robust operation across a wide range of capacitive loads in ultra-low-voltage (ULV) and ultra-low-power (ULP) environments. Implemented entirely with standard-cell inverters and inverting-tristate (ITS) buffers, the proposed architecture operates from a 0.3-V supply while consuming less than 2.7 nW. The digital tuning mechanism enables near-constant gain-bandwidth product (GBW) and average slew rate (SRav) across a 10-110 pF load range, making the OTA suitable for both on-chip and off-chip applications in battery-less and energy-harvested systems. Fabricated in 180-nm CMOS, the OTA achieves > 65-dB DC gain, 3.5-kHz GBW, 0.16-V/ms SRav, and 94% rail-to-rail output swing, while demonstrating strong resilience to PVT variations. Measurements confirm > 2.1X improvement in small-signal efficiency establishing a new state-of-the-art for < 0.5-V digital-based OTAs.
A 3-bit digitally-reconfigurable driving-capability nW-powered three-stage fully-synthesizable inverter-bBased OTA for multi-load/applications / Della Sala, R., Privitera, M., Scotti, G., Dario Grasso, A., Alioto, M.. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS. - ISSN 1558-0806. - (2026), pp. 1-12. [10.1109/TCSI.2026.3694840]
A 3-bit digitally-reconfigurable driving-capability nW-powered three-stage fully-synthesizable inverter-bBased OTA for multi-load/applications
Riccardo Della Sala
Primo
;Giuseppe Scotti;
2026
Abstract
This paper presents a fully synthesizable three-stage inverter-based operational transconductance amplifier (OTA) featuring a 3-bit digitally reconfigurable output stage for robust operation across a wide range of capacitive loads in ultra-low-voltage (ULV) and ultra-low-power (ULP) environments. Implemented entirely with standard-cell inverters and inverting-tristate (ITS) buffers, the proposed architecture operates from a 0.3-V supply while consuming less than 2.7 nW. The digital tuning mechanism enables near-constant gain-bandwidth product (GBW) and average slew rate (SRav) across a 10-110 pF load range, making the OTA suitable for both on-chip and off-chip applications in battery-less and energy-harvested systems. Fabricated in 180-nm CMOS, the OTA achieves > 65-dB DC gain, 3.5-kHz GBW, 0.16-V/ms SRav, and 94% rail-to-rail output swing, while demonstrating strong resilience to PVT variations. Measurements confirm > 2.1X improvement in small-signal efficiency establishing a new state-of-the-art for < 0.5-V digital-based OTAs.| File | Dimensione | Formato | |
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