A new SHF RC I/Q oscillator architecture is presented which is derived from a two-integrator architecture. By using active inductive loads, a high maximum operating frequency is achieved. Automated circuit optimization shows that a maximum oscillation frequency of 20 GHz can be achieved in a 30 GHz f tprocess. The presented I/Q RC architecture is implemented in a 30 GHz ftBiCMOS process. The Carrier to Noise Ratio (CNR) has been optimized by adding small capacitors which reduces the maximum frequency but maximizes the signal swing. Measured tuning range is 6.5 GHz to 8 GHz. A CNR of more than 96 dBc/Hz at 2 MHz offset of the carrier is measured with a VCO core dissipation of 76 mW. The operating voltage is 2.7 V and the active chip area is 0.13 mm2. © 2000 Non IEEE.

A 2.7 V, 8 GHz monolithic I/Q RC oscillator with active inductive loads

Centurelli F.;
2000

Abstract

A new SHF RC I/Q oscillator architecture is presented which is derived from a two-integrator architecture. By using active inductive loads, a high maximum operating frequency is achieved. Automated circuit optimization shows that a maximum oscillation frequency of 20 GHz can be achieved in a 30 GHz f tprocess. The presented I/Q RC architecture is implemented in a 30 GHz ftBiCMOS process. The Carrier to Noise Ratio (CNR) has been optimized by adding small capacitors which reduces the maximum frequency but maximizes the signal swing. Measured tuning range is 6.5 GHz to 8 GHz. A CNR of more than 96 dBc/Hz at 2 MHz offset of the carrier is measured with a VCO core dissipation of 76 mW. The operating voltage is 2.7 V and the active chip area is 0.13 mm2. © 2000 Non IEEE.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1656121
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