A two-stage CMOS transconductance amplifier based on the inverter topology, suitable for very low supply voltages and exhibiting rail-to-rail output capability is presented. The solution consists of the cascade of a noninverting and an inverting stage, both characterized by having only two complementary transistors between the supply rails. The amplifier provides class-AB operation with quiescent current control obtained through an auxiliary loop that utilizes the MOSFETs body terminals. Simulation results, referring to a commercial 28 nm bulk technology, show that the quiescent current of the amplifier can be controlled quite effectively, even adopting a supply voltage as low as 0.5 V. The designed solution consumes around 500 nA of quiescent current in typical conditions and provides a DC gain of around 51 dB, with a unity gain frequency of 1 MHz and phase margin of 70 degrees, for a parallel load of 1 pF and 1.5 MΩ. Settling time at 1% is 6.6 μs, and white noise is 125 nV/Hz−−−√.

0.5 v cmos inverter-based transconductance amplifier with quiescent current control / Ballo, Andrea; Pennisi, Salvatore; Scotti, Giuseppe. - In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS. - ISSN 2079-9268. - 11:4(2021), pp. 1-9. [10.3390/jlpea11040037]

0.5 v cmos inverter-based transconductance amplifier with quiescent current control

Giuseppe Scotti
2021

Abstract

A two-stage CMOS transconductance amplifier based on the inverter topology, suitable for very low supply voltages and exhibiting rail-to-rail output capability is presented. The solution consists of the cascade of a noninverting and an inverting stage, both characterized by having only two complementary transistors between the supply rails. The amplifier provides class-AB operation with quiescent current control obtained through an auxiliary loop that utilizes the MOSFETs body terminals. Simulation results, referring to a commercial 28 nm bulk technology, show that the quiescent current of the amplifier can be controlled quite effectively, even adopting a supply voltage as low as 0.5 V. The designed solution consumes around 500 nA of quiescent current in typical conditions and provides a DC gain of around 51 dB, with a unity gain frequency of 1 MHz and phase margin of 70 degrees, for a parallel load of 1 pF and 1.5 MΩ. Settling time at 1% is 6.6 μs, and white noise is 125 nV/Hz−−−√.
2021
feedback amplifier; analog; CMOS; bulk; class AB; low voltage
01 Pubblicazione su rivista::01a Articolo in rivista
0.5 v cmos inverter-based transconductance amplifier with quiescent current control / Ballo, Andrea; Pennisi, Salvatore; Scotti, Giuseppe. - In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS. - ISSN 2079-9268. - 11:4(2021), pp. 1-9. [10.3390/jlpea11040037]
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1615026
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