The fabrication of a novel class of microgrippers is demonstrated by means of bulk microelectromechanical systems (MEMS) technology using silicon on insulator wafer substrates and deep reactive ion etching. Hard masking is implemented to maximize the selectivity of the bulk etching using sputtered aluminum and aluminum–titanium thin films. The microroughness problem related to the use of metal mask is addressed by testing different mask combinations and etching parameters. The O2 flow, SF6 pressure, wafer temperature, and bias power are examined, and the effect of each parameter on micromasking is assessed. Sidewall damage associated with the use of a metal mask is eliminated by interposing a dielectric layer between silicon substrate and metal mask. Dedicated combdrive anchors are implemented to etch safely both silicon sides down to the buried oxide, and to preserve the wafer integrity until the final wet release of the completed structures. A first set of complete devices is realized and tested under electrical actuation.
Fabrication of novel MEMS microgrippers by deep reactive ion etching with metal hard mask / Bagolini, Alvise; Ronchin, Sabina; Bellutti, Pierluigi; Chiste, Matteo; Verotti, Matteo; Belfiore, Nicola Pio. - In: JOURNAL OF MICROELECTROMECHANICAL SYSTEMS. - ISSN 1057-7157. - 26:4(2017), pp. 926-934. [10.1109/JMEMS.2017.2696033]
Fabrication of novel MEMS microgrippers by deep reactive ion etching with metal hard mask
VEROTTI, Matteo;BELFIORE, Nicola Pio
2017
Abstract
The fabrication of a novel class of microgrippers is demonstrated by means of bulk microelectromechanical systems (MEMS) technology using silicon on insulator wafer substrates and deep reactive ion etching. Hard masking is implemented to maximize the selectivity of the bulk etching using sputtered aluminum and aluminum–titanium thin films. The microroughness problem related to the use of metal mask is addressed by testing different mask combinations and etching parameters. The O2 flow, SF6 pressure, wafer temperature, and bias power are examined, and the effect of each parameter on micromasking is assessed. Sidewall damage associated with the use of a metal mask is eliminated by interposing a dielectric layer between silicon substrate and metal mask. Dedicated combdrive anchors are implemented to etch safely both silicon sides down to the buried oxide, and to preserve the wafer integrity until the final wet release of the completed structures. A first set of complete devices is realized and tested under electrical actuation.File | Dimensione | Formato | |
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