Transactional Memory (TM) implementations guaranteeing disjoint-access parallelism (DAP) are desirable on multi-core architectures because they can exploit low-level parallelism. In this paper we look for a breach in the wall of existing impossibility results on DAP TMs, by identifying the strongest consistency and liveness guarantees that a DAP TM can ensure while maximizing efficiency in read-dominated workloads. Along the path of designing this protocol, we report two impossibility results related to ensuring real-time order in a DAP TM. © Springer-Verlag Berlin Heidelberg 2014.
Brief announcement: Breaching the wall of impossibility results on disjoint-access parallel TM / Peluso, Sebastiano; Palmieri, Roberto; Romano, Paolo; Ravindran, Binoy; Quaglia, Francesco. - STAMPA. - 8784:(2014), pp. 548-549. (Intervento presentato al convegno 28th International Symposium on Distributed Computing, DISC 2014 tenutosi a Austin, TX; USA nel 12-15 October 2014).
Brief announcement: Breaching the wall of impossibility results on disjoint-access parallel TM
Peluso, Sebastiano;QUAGLIA, Francesco
2014
Abstract
Transactional Memory (TM) implementations guaranteeing disjoint-access parallelism (DAP) are desirable on multi-core architectures because they can exploit low-level parallelism. In this paper we look for a breach in the wall of existing impossibility results on DAP TMs, by identifying the strongest consistency and liveness guarantees that a DAP TM can ensure while maximizing efficiency in read-dominated workloads. Along the path of designing this protocol, we report two impossibility results related to ensuring real-time order in a DAP TM. © Springer-Verlag Berlin Heidelberg 2014.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
