The goal of System Level Formal Verification (SLFV) is to show system correctness notwithstanding uncontrollable events (such as: faults, variation in system parameters, external inputs, etc). Hardware In the Loop Simulation (HILS) based SLFV attains such a goal by considering exhaustively all relevant simulation scenarios. We present a distributed multi-core algorithm for HILS-based SLFV. Our experimental results on the Fuel Control System example in the Simulink distribution show that by using 64 machines with an 8 core processor each we can complete the SLFV activity in about 27 hours whereas a sequential approach would require more than 200 days. To the best of our knowledge this is the first time that a distributed multi-core algorithm for HILS-based SLFV is presented. © 2014 IEEE.

System level formal verification via distributed multi-core hardware in the loop simulation / Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico. - STAMPA. - (2014), pp. 734-742. (Intervento presentato al convegno 2014 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2014 tenutosi a Torino, Italy nel 12 February 2014 through 14 February 2014) [10.1109/pdp.2014.32].

System level formal verification via distributed multi-core hardware in the loop simulation

MANCINI, Toni;MARI, FEDERICO;MASSINI, Annalisa;MELATTI, IGOR;TRONCI, Enrico
2014

Abstract

The goal of System Level Formal Verification (SLFV) is to show system correctness notwithstanding uncontrollable events (such as: faults, variation in system parameters, external inputs, etc). Hardware In the Loop Simulation (HILS) based SLFV attains such a goal by considering exhaustively all relevant simulation scenarios. We present a distributed multi-core algorithm for HILS-based SLFV. Our experimental results on the Fuel Control System example in the Simulink distribution show that by using 64 machines with an 8 core processor each we can complete the SLFV activity in about 27 hours whereas a sequential approach would require more than 200 days. To the best of our knowledge this is the first time that a distributed multi-core algorithm for HILS-based SLFV is presented. © 2014 IEEE.
2014
2014 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2014
hybrid systems; distributed multi-core hardware in the loops simulation; model checking; system level formal verification
04 Pubblicazione in atti di convegno::04b Atto di convegno in volume
System level formal verification via distributed multi-core hardware in the loop simulation / Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Tronci, Enrico. - STAMPA. - (2014), pp. 734-742. (Intervento presentato al convegno 2014 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2014 tenutosi a Torino, Italy nel 12 February 2014 through 14 February 2014) [10.1109/pdp.2014.32].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/536138
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