Classification systems specifically designed to deal with fully labeled graphs are gaining importance in many application fields. The main computational bottleneck in such systems is the dissimilarity measure between pairs of graphs. In this paper we propose to accelerate in hardware such computations, relying on the Graph Coverage as the core inexact graph matching procedure, targeting the design to FPGA as an inexpensive way to design specific co-processing devices. A comparison in terms of computational time between the proposed system and a software implementation on a standard workstation shows encouraging results. © 2013 IEEE.

Graph Coverage: an FPGA-targeted Implementation / Cinti, Alessandro; Rizzi, Antonello. - (2013), pp. 129-132. (Intervento presentato al convegno 9th Conference on Ph D Research in Microelectronics and Electronics (PRIME) tenutosi a Villach; Austria nel JUN 24-27, 2013) [10.1109/prime.2013.6603103].

Graph Coverage: an FPGA-targeted Implementation

CINTI, ALESSANDRO;RIZZI, Antonello
2013

Abstract

Classification systems specifically designed to deal with fully labeled graphs are gaining importance in many application fields. The main computational bottleneck in such systems is the dissimilarity measure between pairs of graphs. In this paper we propose to accelerate in hardware such computations, relying on the Graph Coverage as the core inexact graph matching procedure, targeting the design to FPGA as an inexpensive way to design specific co-processing devices. A comparison in terms of computational time between the proposed system and a software implementation on a standard workstation shows encouraging results. © 2013 IEEE.
2013
9th Conference on Ph D Research in Microelectronics and Electronics (PRIME)
fpga; graph coverage; parallel computing; tensor product
04 Pubblicazione in atti di convegno::04b Atto di convegno in volume
Graph Coverage: an FPGA-targeted Implementation / Cinti, Alessandro; Rizzi, Antonello. - (2013), pp. 129-132. (Intervento presentato al convegno 9th Conference on Ph D Research in Microelectronics and Electronics (PRIME) tenutosi a Villach; Austria nel JUN 24-27, 2013) [10.1109/prime.2013.6603103].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/524936
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