Linear data-driven architectures implementing neural network models

This paper presents a digital implementation of neural network models, based on a linear arral of processors provided with a local memory and !ocallt connected through two data buses, one of which is bi-directional. The main advantages of the proposed architecture are the localitel of its connections, a high e.fficiencl and the abilitl to be expanded and reconfigured easill. For these reasons, this architecture is very suitable both for VLSI implementation and for implementation through an arrant of DSP processors on a board. The implementation of the multilatter perceptron with back propagation learning algorithm and of the counterpropagation neural model is discussed in detail. It is shown that, despite the localitel of the connections, the degree of parallelism achieved is very high.