The Boltzmann Machine represent an interesting computation paradigm that can be applied in several fields such combinatorial optimization, pattern recognition and knowledge representation. Although Boltzmann Machine has been proved to give high quality results, its application in real problems has been limited by the heavy computational load it requires mainly due to the sequential nature of the simulated annealing algorithm needed for equilibrating the network. Thank to a parallel algorithm, we have developed, Boltzmann Machine features can now be exploited by using a parallel machine. We describe the design of a first prototype of a parallel SIMD architecture that supports the Boltzmann Machine and allows a speedup of N where N is the number of the processing nodes.

DESIGN OF A MASSIVELY PARALLEL SIMD ARCHITECTURE FOR THE BOLTZMANN MACHINE / A., De Gloria; P., Faraboschi; Olivieri, Mauro. - In: MICROPROCESSING AND MICROPROGRAMMING. - ISSN 0165-6074. - 37:1-5(1993), pp. 153-156. (Intervento presentato al convegno 18TH EUROMICRO CONF - SOFTWARE AND HARDWARE : SPECIFICATION AND DESIGN ( EUROMICRO 92 ) tenutosi a PARIS, FRANCE nel SEP 14-17, 1992) [10.1016/0165-6074(93)90037-l].

DESIGN OF A MASSIVELY PARALLEL SIMD ARCHITECTURE FOR THE BOLTZMANN MACHINE

OLIVIERI, Mauro
1993

Abstract

The Boltzmann Machine represent an interesting computation paradigm that can be applied in several fields such combinatorial optimization, pattern recognition and knowledge representation. Although Boltzmann Machine has been proved to give high quality results, its application in real problems has been limited by the heavy computational load it requires mainly due to the sequential nature of the simulated annealing algorithm needed for equilibrating the network. Thank to a parallel algorithm, we have developed, Boltzmann Machine features can now be exploited by using a parallel machine. We describe the design of a first prototype of a parallel SIMD architecture that supports the Boltzmann Machine and allows a speedup of N where N is the number of the processing nodes.
1993
01 Pubblicazione su rivista::01a Articolo in rivista
DESIGN OF A MASSIVELY PARALLEL SIMD ARCHITECTURE FOR THE BOLTZMANN MACHINE / A., De Gloria; P., Faraboschi; Olivieri, Mauro. - In: MICROPROCESSING AND MICROPROGRAMMING. - ISSN 0165-6074. - 37:1-5(1993), pp. 153-156. (Intervento presentato al convegno 18TH EUROMICRO CONF - SOFTWARE AND HARDWARE : SPECIFICATION AND DESIGN ( EUROMICRO 92 ) tenutosi a PARIS, FRANCE nel SEP 14-17, 1992) [10.1016/0165-6074(93)90037-l].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/477927
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