We present the analytical model and the electrical characterization of a controllable delay component for a micropipeline architecture suitable for being designed with a semicustom design approach. An interesting feature of the component is that it is lockable, i.e., it can be controlled in an on/off fashion, permitting synchronous operation for testing purposes by means of an opportune architecture model.
EFFICIENT SEMICUSTOM MICROPIPELINE DESIGN / A., Degloria; Olivieri, Mauro. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - 3:3(1995), pp. 464-469. [10.1109/92.407007]
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Titolo: | EFFICIENT SEMICUSTOM MICROPIPELINE DESIGN | |
Autori: | ||
Data di pubblicazione: | 1995 | |
Rivista: | ||
Citazione: | EFFICIENT SEMICUSTOM MICROPIPELINE DESIGN / A., Degloria; Olivieri, Mauro. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - 3:3(1995), pp. 464-469. [10.1109/92.407007] | |
Handle: | http://hdl.handle.net/11573/43150 | |
Appartiene alla tipologia: | 01a Articolo in rivista |