RF sputtered Ta O films (23–26 nm) on Si, before and after high temperature (873, 1123 K) O annealing have been 2 5 2 investigated with respect to their dielectric and microstructural properties.Both high resolution transmission electron microscopy (HR-TEM) analysis and electrical measurements indicated the presence of extremely thin SiO at the interface with Si.The 2 substrate temperature during deposition has no effect on the flatness of the SiO –Ta O interface but it affects the flatness of the 2 2 5 Si–SiO interface—for films obtained on heated substrate, this interface becomes abrupt.The as-deposited and the annealed, at 2 873 K, films are amorphous where as after 1123 K annealing, they crystallize in orthorhombic phase, (there is evidence that the crystal phase electrically manifests as slow states).The crystallization of the films favor a larger dielectric constant at 1 MHz and a smaller leakage current especially in the dielectric voltage region, which will be the operating voltage for future technology generations.A leakage current of ;10 Aycm at 1 V can be achieved.The results are discussed in terms of relative impact of y9 2 two concurrent mechanisms during high temperature O treatment—an appearance of crystal phase and a real annealing of the 2 films accompanied with an improvement of the dielectric properties.
High temperature induced crystallization in tantalum pentoxide layers and its influence on the electrical properties / Atanassova, A.; Kalitzova, M.; Zollo, Giuseppe; Paskaleva, A.; Peeva, A.; Georgieva, M.; Vitali, Gianfranco. - In: THIN SOLID FILMS. - ISSN 0040-6090. - STAMPA. - 426:(2003), pp. 191-199. [10.1016/S0040-6090(03)00027-0]
High temperature induced crystallization in tantalum pentoxide layers and its influence on the electrical properties
ZOLLO, Giuseppe;VITALI, Gianfranco
2003
Abstract
RF sputtered Ta O films (23–26 nm) on Si, before and after high temperature (873, 1123 K) O annealing have been 2 5 2 investigated with respect to their dielectric and microstructural properties.Both high resolution transmission electron microscopy (HR-TEM) analysis and electrical measurements indicated the presence of extremely thin SiO at the interface with Si.The 2 substrate temperature during deposition has no effect on the flatness of the SiO –Ta O interface but it affects the flatness of the 2 2 5 Si–SiO interface—for films obtained on heated substrate, this interface becomes abrupt.The as-deposited and the annealed, at 2 873 K, films are amorphous where as after 1123 K annealing, they crystallize in orthorhombic phase, (there is evidence that the crystal phase electrically manifests as slow states).The crystallization of the films favor a larger dielectric constant at 1 MHz and a smaller leakage current especially in the dielectric voltage region, which will be the operating voltage for future technology generations.A leakage current of ;10 Aycm at 1 V can be achieved.The results are discussed in terms of relative impact of y9 2 two concurrent mechanisms during high temperature O treatment—an appearance of crystal phase and a real annealing of the 2 films accompanied with an improvement of the dielectric properties.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.