A novel 0.62 nW inverter based digital-OTA

In this paper, we present a novel ultra-low voltage (ULV) operational transconductance amplifier (OTA) topology inspired by the DIG-OTA. The proposed amplifier architecture leverages the principles of the conventional DIG-OTA while incorporating an inverter-based common-mode feedback (CMFB) loop and an inverter-based output stage. Designed using TSMC's 180 nm CMOS process, the proposed architecture achieves a gain of 49dB, a gain-bandwidth product of about 3.72 kHz, and a phase margin of 55 degrees, with an output load capacitance of only 5 pF that can be integrated on-chip. The CMFB mechanism implemented here ensures a commendable common-mode rejection ratio (CMRR), as high as 65 dB, which remains stable across process, supply voltage, and temperature (PVT) variations. Additionally, the power consumption of the proposed OTA is remarkably low at just 0.62 nW. All of these characteristics put the proposed OTA at the state-of-the-art of ULV OTAs.