A triple latched ultra-low-voltage rail-to-rail ICMR standard-cell based comparator

A triple latched NOR2-based standard-cell comparator, with Rail-to-Rail input common mode range (ICMR) is presented. The topology aims at lowering the clock-to-output delay with respect to the previously presented standard-cell-based comparators with Rail-to-Rail ICMR feature. Moreover, the achieved speed is higher than the NOR2-based topology previously presented by the authors, and the improvements are in the order of 3 × to 20 × higher speed and 3 × to 12 × lower PDP, with respect to the other standard-cell-based Rail-to-Rail ICMR topologies in literature. The circuit has been validated considering a 45 nm CMOS technology and the power supply voltage scaled down to 0.6V, 0.3V and 0.15 V.