Recently, Linear Temporal Logics on finite traces, such as ltlf (or ldlf), have been advocated as high-level formalisms to express dynamic properties, such as goals in planning domains or rewards in Reinforcement Learning (RL). This paper addresses the challenge of separating high-level temporal specifications from the low-level details of the underlying environment (domain or MDP), by allowing for expressing the specifications at a different time granularity than the environment. We study the notion of a clock which progresses the high-level ltlf specification, whose ticks are triggered by dynamic (low-level) properties defined on the underlying environment. The obtained separation enables terse high-level specifications while allowing for very expressive forms of clock expressed as general ltlf properties over low-level features, such as counting or occurrence/alternation of special events. We devise an automata-based construction to compile away the clock into a deterministic automaton that is polynomial in the size of the automata characterizing the high-level and clock specifications. We show the correctness of the approach and discuss its application in several contexts, including FOND planning, RL with ltlf Restraining Bolts, and Reward Machines.

Clock Specifications for Temporal Tasks in Planning and Learning / De Giacomo, G.; Favorito, M.; Patrizi, F.. - 3629:(2023), pp. 93-98. ( 5th Workshop on Artificial Intelligence and Formal Verification, Logic, Automata, and Synthesis, OVERLAY 2023 Rome; Italy ).

Clock Specifications for Temporal Tasks in Planning and Learning

De Giacomo G.
;
Favorito M.;Patrizi F.
2023

Abstract

Recently, Linear Temporal Logics on finite traces, such as ltlf (or ldlf), have been advocated as high-level formalisms to express dynamic properties, such as goals in planning domains or rewards in Reinforcement Learning (RL). This paper addresses the challenge of separating high-level temporal specifications from the low-level details of the underlying environment (domain or MDP), by allowing for expressing the specifications at a different time granularity than the environment. We study the notion of a clock which progresses the high-level ltlf specification, whose ticks are triggered by dynamic (low-level) properties defined on the underlying environment. The obtained separation enables terse high-level specifications while allowing for very expressive forms of clock expressed as general ltlf properties over low-level features, such as counting or occurrence/alternation of special events. We devise an automata-based construction to compile away the clock into a deterministic automaton that is polynomial in the size of the automata characterizing the high-level and clock specifications. We show the correctness of the approach and discuss its application in several contexts, including FOND planning, RL with ltlf Restraining Bolts, and Reward Machines.
2023
5th Workshop on Artificial Intelligence and Formal Verification, Logic, Automata, and Synthesis, OVERLAY 2023
Automata Theory; Learning for Temporal Tasks; Planning; Temporal Logics
04 Pubblicazione in atti di convegno::04b Atto di convegno in volume
Clock Specifications for Temporal Tasks in Planning and Learning / De Giacomo, G.; Favorito, M.; Patrizi, F.. - 3629:(2023), pp. 93-98. ( 5th Workshop on Artificial Intelligence and Formal Verification, Logic, Automata, and Synthesis, OVERLAY 2023 Rome; Italy ).
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1738707
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