In this work, we present and analyse some possible schemes for the implementation through all-optical logic gates of a complete Gated Recurrent Unit that is adopted in deep neural networks. We start by defining the mathematical operations required in a GRU cell and their corresponding optical circuit. A key role in those schemes is given to Semiconductor Optical Amplifiers, whose active operations are modelled in the paper. They are employed in a Cross-Phase Modulation configuration, which was used to analyse a XOR gate. Our analysis considers noisy input signals and nonidealities caused by band-pass filters in the optical channels. The models investigated also include the delays of signals in transition through the amplifiers, with the aim of estimating actual constraints to be considered in real implementations.

Analysis of Logic Schemes for the Optical Implementation of Pointwise Operations in Gated Recurrent Unit Cells / Alam, Badrul; Ceschini, Andrea; Rosato, Antonello; Panella, Massimo; Asquini, Rita. - (2023), pp. 167-173. - LECTURE NOTES IN ELECTRICAL ENGINEERING. [10.1007/978-3-031-25706-3_27].

Analysis of Logic Schemes for the Optical Implementation of Pointwise Operations in Gated Recurrent Unit Cells

Alam, Badrul;Ceschini, Andrea;Rosato, Antonello;Panella, Massimo;Asquini, Rita
2023

Abstract

In this work, we present and analyse some possible schemes for the implementation through all-optical logic gates of a complete Gated Recurrent Unit that is adopted in deep neural networks. We start by defining the mathematical operations required in a GRU cell and their corresponding optical circuit. A key role in those schemes is given to Semiconductor Optical Amplifiers, whose active operations are modelled in the paper. They are employed in a Cross-Phase Modulation configuration, which was used to analyse a XOR gate. Our analysis considers noisy input signals and nonidealities caused by band-pass filters in the optical channels. The models investigated also include the delays of signals in transition through the amplifiers, with the aim of estimating actual constraints to be considered in real implementations.
2023
Sensors and Microsystems
978-3-031-25705-6
978-3-031-25706-3
optical logic gate; photonic circuits; semiconductor optical amplifier; gated recurrent unit; deep neural network
02 Pubblicazione su volume::02a Capitolo o Articolo
Analysis of Logic Schemes for the Optical Implementation of Pointwise Operations in Gated Recurrent Unit Cells / Alam, Badrul; Ceschini, Andrea; Rosato, Antonello; Panella, Massimo; Asquini, Rita. - (2023), pp. 167-173. - LECTURE NOTES IN ELECTRICAL ENGINEERING. [10.1007/978-3-031-25706-3_27].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1675690
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