The paper presents a reduced ADC architecture obtained by introducing the subranging technique into the scheme of a caliper AD converter. This last converter was already proposed as an application of a theory which describes the comparison between scales having the steps prime each other. This converter architecture drastically reduces the number of the required resistors for a full flash realization. The introduction of the subranging technique into the caliper ADC here presented reduces also the number of the required comparators. The result is a very compact architecture. The paper describes a first intention architecture based on ideal components. An example of SPICE simulation is given.
Reference folding subranging caliper ADC / Lojacono, R.; Mencattini, A.; Salmeri, M.; Sangiovanni, S.. - (2007), pp. 1-5. (Intervento presentato al convegno 12th IMEKO TC-4 International Workshop on ADC Modelling and Testing tenutosi a Romania).
Reference folding subranging caliper ADC
Lojacono R.;Sangiovanni S.
2007
Abstract
The paper presents a reduced ADC architecture obtained by introducing the subranging technique into the scheme of a caliper AD converter. This last converter was already proposed as an application of a theory which describes the comparison between scales having the steps prime each other. This converter architecture drastically reduces the number of the required resistors for a full flash realization. The introduction of the subranging technique into the caliper ADC here presented reduces also the number of the required comparators. The result is a very compact architecture. The paper describes a first intention architecture based on ideal components. An example of SPICE simulation is given.File | Dimensione | Formato | |
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Lojacono_Reference folding subranging_2007.pdf
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