PSK modulations are very widespread in communication due to their robustness to the noise. In order to avoid interference or for anti-jamming purposes, frequency hopping may be applied. In this work we present an FPGA implementation of a BPSK modulator based on frequency hopping. The results shows good performance, more than 300 MHz of clock system, low area occupation and low power dissipation (about 100 mW).
FPGA Implementation of a BPSK Modulator with Frequency Hopping / Beritelli, F.; Capizzi, G.; Rametta, C.; Napoli, C.. - 3118:(2021), pp. 40-44. (Intervento presentato al convegno 2021 International Conference of Yearly Reports on Informatics, Mathematics and Engineering, ICYRIME 2021 tenutosi a Virtual, Online).
FPGA Implementation of a BPSK Modulator with Frequency Hopping
Rametta C.
Secondo
Software
;Napoli C.
Ultimo
Supervision
2021
Abstract
PSK modulations are very widespread in communication due to their robustness to the noise. In order to avoid interference or for anti-jamming purposes, frequency hopping may be applied. In this work we present an FPGA implementation of a BPSK modulator based on frequency hopping. The results shows good performance, more than 300 MHz of clock system, low area occupation and low power dissipation (about 100 mW).| File | Dimensione | Formato | |
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Beritelli_FPGA_2021.pdf
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