Smashing SDN "built-in" actions: programmable data plane packet manipulation in hardware

Recently, with new hardware architectures such as Reconfigurable Match Tables and languages such as P4, the Software Defined Networking community has started to bring linerate data plane programmatic flexibility inside switching chipsets. Starting from the original OpenFlow's match/action abstraction, most of the work has so far focused on key improvements in matching flexibility. Conversely, the "action" part, i.e. the set of operations (such as encapsulation or header manipulation) performed on packets after the forwarding decision, has received way less attention: the OpenFlow community has limited to standardize the set of supported actions, whereas their implementation has been delegated to each specific vendor/device. Goal of this paper is to move beyond the idea of "atomic", pre-implemented, actions, and rather make them programmable while retaining high speed multi-gbps operation. In this work we propose a domain-specific HW architecture, called Packet Manipulation Processor (PMP), able to efficiently support microprograms implementing such actions. We describe three non trivial use cases (tunneling, NAT, and ARP reply generation), and assess the relevant throughput performance.