In this paper we propose a novel hardware implementation for a bidimensional unconstrained hierarchical clustering method, based on fuzzy logic and membership functions. Unlike classical clustering approaches, our work is based on an advanced algorithm that shows an intrinsic parallelism. Such parallelism can be exploited to design an efficient hardware implementation suitable for low-resources, low-power and highcomputational demanding applications like smart-sensors and IoT devices. We validated our design by an extensive simulation campaign on well known 2D clustering datasets. Our solution shows the same clustering performances of the original algorithm despite the applied mathematical approximations and the small word-lengths used in the fixed point arithmetic.

A parallel hardware implementation for 2-D hierarchical clustering based on fuzzy logic / Cardarilli, G. C.; Nunzio, L. D.; Fazzolari, R.; Panella, M.; Re, M.; Rosato, A.; Spano, S.. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS. - ISSN 1549-7747. - 68:4(2021), pp. 1428-1432. [10.1109/TCSII.2020.3032660]

A parallel hardware implementation for 2-D hierarchical clustering based on fuzzy logic

Panella M.;Rosato A.;
2021

Abstract

In this paper we propose a novel hardware implementation for a bidimensional unconstrained hierarchical clustering method, based on fuzzy logic and membership functions. Unlike classical clustering approaches, our work is based on an advanced algorithm that shows an intrinsic parallelism. Such parallelism can be exploited to design an efficient hardware implementation suitable for low-resources, low-power and highcomputational demanding applications like smart-sensors and IoT devices. We validated our design by an extensive simulation campaign on well known 2D clustering datasets. Our solution shows the same clustering performances of the original algorithm despite the applied mathematical approximations and the small word-lengths used in the fixed point arithmetic.
2021
machine learning; clustering; hierarchical clustering; low-power; hardware acceleration; Field Programmable Gate Arrays; Fuzzy Logic; Membership Functions
01 Pubblicazione su rivista::01a Articolo in rivista
A parallel hardware implementation for 2-D hierarchical clustering based on fuzzy logic / Cardarilli, G. C.; Nunzio, L. D.; Fazzolari, R.; Panella, M.; Re, M.; Rosato, A.; Spano, S.. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS. - ISSN 1549-7747. - 68:4(2021), pp. 1428-1432. [10.1109/TCSII.2020.3032660]
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1461000
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