The NA62 experiment at CERN SPS is aimed at measuring the branching ratio of the the very rare kaon decay Kpnn. NaNet is the reconfigurable design of a FPGA-based PCI Express Network Interface Card with processing, RDMA and GPUDirect capabilities, supporting multiple link technologies.NaNet has been employed to implement a real-time distributed processing pipeline in the the low level trigger of the experiment, operating on the data streams produced by the RICH detector with an orchestrated combination of heterogeneous computing devices (CPUs, FPGAs and GPUs).Recent results collected during NA62 runs are presented and discussed.

NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger / Cretaro, Paolo; Biagioni, Andrea; Frezza, Ottorino; Lo Cicero, Francesca; Lonardo, Alessandro; Martinelli, Michele; Paolucci, Pier Stanislao; Pontisso, Luca; Simula, Francesco; Vicini, Piero; Capone, Cristiano; Capuani, Fabrizio; De Bonis, Giulia; Pastorelli, Elena; Ammendola, Roberto; Lamanna, Gianluca; Sozzi, Marco; Piandani, Roberto; Soldi, Dario. - (2019). (Intervento presentato al convegno Topical Workshop on Electronics for Particle Physics (TWEPP18) tenutosi a Antwerpen; Belgium) [10.22323/1.343.0118].

NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger

Cretaro, Paolo;Lonardo, Alessandro;Martinelli, Michele;Pastorelli, Elena;
2019

Abstract

The NA62 experiment at CERN SPS is aimed at measuring the branching ratio of the the very rare kaon decay Kpnn. NaNet is the reconfigurable design of a FPGA-based PCI Express Network Interface Card with processing, RDMA and GPUDirect capabilities, supporting multiple link technologies.NaNet has been employed to implement a real-time distributed processing pipeline in the the low level trigger of the experiment, operating on the data streams produced by the RICH detector with an orchestrated combination of heterogeneous computing devices (CPUs, FPGAs and GPUs).Recent results collected during NA62 runs are presented and discussed.
2019
Topical Workshop on Electronics for Particle Physics (TWEPP18)
NA62; interface; FPGA; RICH; microprocessor; multiprocessor: graphics; electronics: communications; performance
04 Pubblicazione in atti di convegno::04b Atto di convegno in volume
NaNet: a Reconfigurable PCIe Network Interface Card Architecture for Real-time Distributed Heterogeneous Stream Processing in the NA62 Low Level Trigger / Cretaro, Paolo; Biagioni, Andrea; Frezza, Ottorino; Lo Cicero, Francesca; Lonardo, Alessandro; Martinelli, Michele; Paolucci, Pier Stanislao; Pontisso, Luca; Simula, Francesco; Vicini, Piero; Capone, Cristiano; Capuani, Fabrizio; De Bonis, Giulia; Pastorelli, Elena; Ammendola, Roberto; Lamanna, Gianluca; Sozzi, Marco; Piandani, Roberto; Soldi, Dario. - (2019). (Intervento presentato al convegno Topical Workshop on Electronics for Particle Physics (TWEPP18) tenutosi a Antwerpen; Belgium) [10.22323/1.343.0118].
File allegati a questo prodotto
File Dimensione Formato  
Cretaro_NaNet_2019.pdf

solo gestori archivio

Tipologia: Versione editoriale (versione pubblicata con il layout dell'editore)
Licenza: Tutti i diritti riservati (All rights reserved)
Dimensione 1.07 MB
Formato Adobe PDF
1.07 MB Adobe PDF   Contatta l'autore

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1353310
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus ND
  • ???jsp.display-item.citation.isi??? ND
social impact