A novel current operational amplifier, in which the traditionally adopted input current follower is replaced by an input stage that exhibits current gain and single-input-to-differential-output conversion, is presented. Due to this, increased values of both dc gain and common-mode rejection ratio (CMRR) are obtained in the overall amplifier. A CMOS implementation, along with postlayout simulations, which are in good agreement with expected data, is also included. The proposed design is supplied with 2.5 V, dissipates 0.7 mW, and provides a nominal dc gain, a gain-bandwidth product, and a CMRR (at dc) of 72 dB, 28 MHz, and greater than 100 dB, respectively.
High-CMRR current amplifier architecture and its CMOS implementation / S., Pennisi; M., Piccioni; Scotti, Giuseppe; Trifiletti, Alessandro. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS. - ISSN 1549-8328. - 53:10(2006), pp. 1118-1122. [10.1109/tcsii.2006.882123]
High-CMRR current amplifier architecture and its CMOS implementation
SCOTTI, Giuseppe;TRIFILETTI, Alessandro
2006
Abstract
A novel current operational amplifier, in which the traditionally adopted input current follower is replaced by an input stage that exhibits current gain and single-input-to-differential-output conversion, is presented. Due to this, increased values of both dc gain and common-mode rejection ratio (CMRR) are obtained in the overall amplifier. A CMOS implementation, along with postlayout simulations, which are in good agreement with expected data, is also included. The proposed design is supplied with 2.5 V, dissipates 0.7 mW, and provides a nominal dc gain, a gain-bandwidth product, and a CMRR (at dc) of 72 dB, 28 MHz, and greater than 100 dB, respectively.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
