A mathematical model for the output signal’s energy of a multidimensional ideal DAC is presented considering sampling clock jitter. More specifically, a new model is formulated to prove one-sided energy inequality for the output signal, for which the base time is affected by the jitter. Moreover, a family of annihilate operators is defined and applied to the ideal (one-dimensional) DAC model to estimate the output signal energy.

Mathematical Model for the Output Signal’s Energy of an Ideal DAC in the Presence of Clock Jitter / Loreti, Paola; Sarv Ahrabi, Sima; Vellucci, Pierluigi. - (2018), pp. 410-422. - LECTURE NOTES IN ELECTRICAL ENGINEERING. [10.1007/978-3-319-55011-4_20].

Mathematical Model for the Output Signal’s Energy of an Ideal DAC in the Presence of Clock Jitter

Loreti, Paola;Sarv Ahrabi, Sima;Vellucci, Pierluigi
2018

Abstract

A mathematical model for the output signal’s energy of a multidimensional ideal DAC is presented considering sampling clock jitter. More specifically, a new model is formulated to prove one-sided energy inequality for the output signal, for which the base time is affected by the jitter. Moreover, a family of annihilate operators is defined and applied to the ideal (one-dimensional) DAC model to estimate the output signal energy.
System Modeling and Optimization
978-331955010-7
output signal's energy, DAC
02 Pubblicazione su volume::02a Capitolo, Articolo o Contributo
Mathematical Model for the Output Signal’s Energy of an Ideal DAC in the Presence of Clock Jitter / Loreti, Paola; Sarv Ahrabi, Sima; Vellucci, Pierluigi. - (2018), pp. 410-422. - LECTURE NOTES IN ELECTRICAL ENGINEERING. [10.1007/978-3-319-55011-4_20].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11573/1017515
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