Sfoglia per Autore
Area-efficient low-power bandpass Gm-C filter for epileptic seizure detection in 130nm CMOS
2019 Della Sala, R.; Monsurro, P.; Scotti, G.; Trifiletti, A.
A novel ultra-compact FPGA PUF: The DD-PUF
2021 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
A 0.3 V, rail-to-rail, ultralow-power, non-tailed, body-driven, sub-threshold amplifier
2021 Centurelli, Francesco; DELLA SALA, Riccardo; Scotti, Giuseppe; Trifiletti, Alessandro
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate
2021 Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
A novel OTA architecture exploiting current gain stages to boost bandwidth and slew-rate
2021 Centurelli, Francesco; Della Sala, Riccardo; Monsurrò, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
SC-DDPL as a countermeasure against static power side-channel attacks
2021 Bellizia, Davide; DELLA SALA, Riccardo; Scotti, Giuseppe
A Differential-to-Single-Ended Converter Based on Enhanced Body-Driven Current Mirrors Targeting Ultra-Low-Voltage OTAs
2022 DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe; Tommasino, Pasquale; Trifiletti, Alessandro
A Novel differential to single-ended converter for ultra-low-voltage inverter-based OTAs
2022 DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe
Sub-μW front-end low noise amplifier for neural recording applications
2022 DELLA SALA, Riccardo; Centurelli, Francesco; Monsurro, Pietro; Scotti, Giuseppe
High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain
2022 Della Sala, R.; Centurelli, F.; Monsurro, P.; Scotti, G.
Enabling ULV fully synthesizable analog circuits. The BA cell, a standard-cell-based building block for analog design
2022 DELLA SALA, Riccardo; Centurelli, Francesco; Scotti, Giuseppe.
A Novel Ultra-Compact {FPGA}-Compatible {TRNG} Architecture Exploiting Latched Ring Oscillators
2022 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
A Lightweight {FPGA} Compatible Weak-{PUF} Primitive Based on {XOR} Gates
2022 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
High-Throughput FPGA-Compatible TRNG Architecture Exploiting Multistimuli Metastable Cells
2022 Della Sala, Riccardo.; Bellizia, Davide; Scotti, Giuseppe
The DD-Cell: a Double Side Entropic Source exploitable as PUF and TRNG
2022 Della Sala, R; Scotti, G
A standard-cell-based CMFB for fully synthesizable OTAs
2022 Centurelli, Francesco; DELLA SALA, Riccardo; Scotti, Giuseppe
An ultra-low-voltage class-AB OTA exploiting local CMFB and body-to-gate interface
2022 Centurelli, F.; Della Sala, R.; Monsurro, P.; Tommasino, P.; Trifiletti, A.
A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers
2022 Centurelli, F.; Della Sala, R.; Monsurro, P.; Scotti, G.; Trifiletti, A.
A Monostable Physically Unclonable Function Based on Improved RCCMs with 0–1.56% Native Bit Instability at 0.6–1.2 V and 0–75 °C
2023 Della Sala, Riccardo; Bellizia, Davide; Centurelli, Francesco; Scotti, Giuseppe
A 0.3 V Three-Stage Body-Driven OTA
2023 Della Sala, Riccardo; Centurelli, Francesco; Monsurro, Pietro; Scotti, Giuseppe; Trifiletti, Alessandro
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