Sfoglia per Autore
On-chip current-mode approach to thwart CPA attacks in CMOS nanometer technology
2016 Bellizia, Davide; Scotti, Giuseppe; Trifiletti, Alessandro
Implementation of the present-80 block cipher and analysis of its vulnerability to side channel attacks exploiting static power
2016 Bellizia, Davide; Scotti, Giuseppe; Trifiletti, Alessandro
On-chip analog current equalizer as a countermeasure against side-channel attacks in CMOS nanometer technology
2016 Bellizia, Davide; Scotti, Giuseppe; Trifiletti, Alessandro
Univariate power analysis attacks exploiting static dissipation of nanometer CMOS VLSI circuits for cryptographic applications
2017 Bellizia, Davide; Bongiovanni, Simone; Monsurro', Pietro; Trifiletti, Alessandro; Scotti, Giuseppe
Template attacks exploiting static power and application to CMOS lightweight crypto-hardware
2017 Bellizia, Davide; Djukanovic, Milena; Scotti, Giuseppe; Trifiletti, Alessandro
Novel measurements setup for attacks exploiting static power using DC pico-ammeter
2017 Bellizia, Davide; Cellucci, Danilo; Di Stefano, Valerio; Scotti, Giuseppe; Trifiletti, Alessandro
Fully integrable current-mode feedback suppressor as an analog countermeasure against CPA attacks in 40nm CMOS technology
2017 Bellizia, Davide; Scotti, Giuseppe; Trifiletti, Alessandro
Design of low-voltage high-speed CML D-latches in nanometer CMOS technologies
2017 Scotti, Giuseppe; Bellizia, Davide; Trifiletti, Alessandro; Palumbo, Gaetano
VHDL implementation of FWL RLS algorithm
2017 Bellizia, Davide; Monsurro', Pietro; Trifiletti, Alessandro
Multivariate Analysis Exploiting Static Power on Nanoscale CMOS Circuits for Cryptographic Applications
2017 Djukanovic, Milena; Bellizia, Davide; Scotti, Giuseppe; Trifiletti, Alessandro
TEL logic style as a countermeasure against side-channel attacks: secure cells library in 65nm CMOS and experimental results
2018 Bellizia, D.; Scotti, G.; Trifiletti, A.
Secure double rate registers as an RTL countermeasure against power analysis attacks
2018 Bellizia, Davide; Bongiovanni, Simone; Monsurro', Pietro; Scotti, Giuseppe; Trifiletti, Alessandro; Trotta, FRANCESCO BRUNO
Secure implementation of TEL-compatible flip-flops using a standard-cell approach
2018 Bellizia, D.; Scotti, G.; Trifiletti, A.
Design methodologies for cryptographic hardware with countermeasures against side channel attacks
2018 Bellizia, Davide
SC-DDPL. A novel standard-cell based approach for counteracting power analysis attacks in the presence of unbalanced routing
2020 Bellizia, D.; Bongiovanni, S.; Olivieri, M.; Scotti, G.
A novel ultra-compact FPGA PUF: The DD-PUF
2021 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
SC-DDPL as a countermeasure against static power side-channel attacks
2021 Bellizia, Davide; DELLA SALA, Riccardo; Scotti, Giuseppe
A Novel Ultra-Compact {FPGA}-Compatible {TRNG} Architecture Exploiting Latched Ring Oscillators
2022 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
A Lightweight {FPGA} Compatible Weak-{PUF} Primitive Based on {XOR} Gates
2022 DELLA SALA, Riccardo; Bellizia, Davide; Scotti, Giuseppe
High-Throughput FPGA-Compatible TRNG Architecture Exploiting Multistimuli Metastable Cells
2022 Della Sala, Riccardo.; Bellizia, Davide; Scotti, Giuseppe
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